Super Junction Pillar Layout to Reduce SiC Epitaxial Voids

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Solution Overview

Problem

The formation of voids in the manufacturing process of silicon carbide semiconductor devices with super junction structures leads to increased leakage current and invalid regions, resulting in higher costs due to the need for additional processes to reduce leakage current.

Innovation Solution

A semiconductor device design featuring alternating n-type and p-type pillars with a surrounding pillar part of a specific impurity concentration and width configuration, which minimizes the formation of voids during epitaxial growth, thereby reducing invalid regions and leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If embedding epitaxial method is used to form SJ structure, then high withstand voltage and low resistance are achieved, but voids are formed in trench end portions causing increased leakage current

Engineering Contradiction:
Improveleakage currentVSAvoidvoid formation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the geometric parameters of the pillar structure by setting the pillar width to 0.5 μm or less and controlling the product of impurity concentration and width (N·W) to be 1×10^13 to 1×10^16 cm^-2. This parameter optimization prevents void formation during epitaxial growth while maintaining the super junction structure's electrical performance, thereby reducing leakage current without additional processing steps.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional processes are implemented to reduce leakage current, then reliability improves, but manufacturing cost increases

Engineering Contradiction:
Improveleakage currentVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent achieves self-service by designing the pillar structure parameters (width ≤0.5 μm and N·W product control) such that the epitaxial growth process automatically prevents void formation. The structure itself provides the solution to leakage current without requiring external additional processes like trench formation or channel stopper regions, thereby maintaining low manufacturing cost while improving reliability.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design effectively reduces void formation and leakage current, minimizing the need for additional processing and lowering manufacturing costs while maintaining high withstand voltage and low resistance.

Implementation Method 1

an epitaxial method has an advantage in consideration of productivity

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12477789B2Semiconductor device having a plurality of pillars and method of manufacturing the semiconductor device
Publication Date: 2025.11.18 MITSUBISHI ELECTRIC CORP
  • US12477789B2 patent drawing
  • US12477789B2 patent drawing
  • US12477789B2 patent drawing

AI summary

The present disclosure relates a semiconductor device using a super junction structure, and includes: a semiconductor base body of a first conductivity type; a pillar part including a plurality of first pillars of a first conductivity type and a plurality of second pillars of a second conductivity type provided on the semiconductor base body to protrude in a thickness direction of the semiconductor base body; a pillar surrounding part of a first conductivity type or a second conductivity type provided around the pillar part; and a semiconductor element in which the pillar part is provided as an active region, wherein the plurality of first and second pillars have a striped shape in a plan view, and are alternately arranged in parallel to each other in a pillar width direction perpendicular to a longitudinal direction of each of the pillars.