Super Junction Power Device with Integrated Schottky Diode
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Solution Overview
Problem
Current power semiconductor devices face challenges in achieving lower forward voltage, faster reverse recovery performance, and improved reliability to meet the demands of emerging technologies, particularly in telecommunications and computing industries.
Innovation Solution
A power semiconductor device with a super junction structure integrated with a Schottky diode, where the Schottky diode is formed within the unit cell, reducing forward voltage and reverse recovery time by creating a Schottky interface between a metal contact layer and an epitaxial layer, and providing a good current path to minimize dynamic switching issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate Schottky barrier region is created, then leakage current is reduced and reverse recovery characteristics are improved, but device area increases and manufacturing complexity increases
Solution Approach 1:
The patent combines the Schottky barrier region with the transistor region into a single integrated structure. The Schottky barrier diode is formed within the same device footprint as the transistor by creating a shared source region and using a common gate structure, thereby achieving improved reverse recovery characteristics without increasing device area or manufacturing complexity.
Solution Approach 2:
The integrated structure serves multiple functions simultaneously: the Schottky barrier region provides low forward voltage drop and fast reverse recovery, while the transistor region provides switching functionality. The shared source region and gate structure enable both the diode and transistor to operate from the same region, achieving multi-functionality within a single device cell.
2Loss of energy
If forward voltage is reduced, then power efficiency is improved, but conduction losses increase
Solution Approach 1:
The patent applies local quality by creating a highly doped n+ source region specifically at the Schottky barrier interface to reduce contact resistance and forward voltage drop. The localized high doping concentration in the source region improves carrier injection efficiency and reduces conduction losses in the on-state, while the overall device structure maintains high breakdown voltage capability.
Solution Approach 2:
The patent changes the doping parameters of the source region, using a high doping concentration (10^19 to 10^21 atoms/cm³) to reduce the Schottky barrier height and forward voltage drop. This parameter change enables lower conduction losses while maintaining the desired power efficiency through optimized doping profiles in different regions of the device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of the Schottky diode into the power semiconductor device results in lower conduction losses, reduced reverse recovery currents, and enhanced reliability, improving power efficiency and preventing catastrophic failures under high-current conditions.
Implementation Method 1
A metal contact layer is disposed over the base and the sidewall of the trench, the metal contact layer contacting the epi layer at the gap defined by the well and the pillar, thereby defining a Schottky interface at the gap
Data Source
AI summary
A method of forming a power semiconductor device includes providing an epi layer over a substrate; forming a well at an upper portion of the epi layer; forming a pillar below the well and spaced apart from the well to define a Schottky contact region; etching a trench into the epi layer, the trench having a sidewall and a base, a portion of the sidewall of the trench corresponding to the Schottky contact region; forming a metal contact layer over the sidewall and the base of the trench, the metal contact layer forming a Schottky interface with the epi layer at the Schottky contact region; and forming a gate electrode and first and second electrodes.