Super Junction Semiconductor Charge Balance via Tilted Ion Implantation
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Solution Overview
Problem
Existing methods for manufacturing super junction semiconductor devices face challenges in achieving precise charge balance between n- and p-doped regions due to process variations in doping dose and lithographic alignment, affecting the trade-off between on-state resistance and breakdown voltage.
Innovation Solution
A method involving the formation of masks with elongated openings of varying widths, followed by tilted implantation of dopants of different conductivity types, and subsequent epitaxial layer growth, with repeated processes to achieve precise control over the super junction structure, including staggered mask openings and interchanged tilt and twist angles to minimize charge imbalance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional doping and lithographic alignment processes are used, then manufacturing simplicity is maintained, but manufacturing precision of charge balance deteriorates due to process variations
Solution Approach 1:
The patent divides the single doping step into multiple sequential doping steps (first doping step, second doping step, third doping step) with different tilt angles and twist angles. Each step deposits dopants through specific mask openings to form different doped regions (first doped regions, second doped regions, third doped regions) with controlled charge balance, thereby achieving precise charge compensation through segmented process control
Solution Approach 2:
The patent systematically varies critical process parameters including tilt angles (α1, α2, α3), twist angles (ω1, ω2, ω3), and doping doses across multiple doping steps. By changing these parameters in a controlled sequence, the method achieves precise control over the charge balance between n-type and p-type doped regions, overcoming the limitations of conventional single-step doping
2Reliability
If precise charge balance is achieved through multiple parameters, then on-state resistance and breakdown voltage trade-off improves, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming specific mask patterns (first mask openings, second mask openings, third mask openings) with predetermined geometries and positions before each doping step. These pre-configured masks enable controlled dopant deposition through specific angles and paths, ensuring that the charge balance is established in advance through careful process design rather than post-processing adjustment
Solution Approach 2:
The patent employs asymmetric doping configurations by using different tilt angles (α1≠α2≠α3) and twist angles (ω1≠ω2≠ω3) for different doping steps. The mask openings are also designed with asymmetric positions and orientations relative to the semiconductor substrate. This asymmetric approach enables precise control over the spatial distribution and charge balance of doped regions, achieving superior device performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise control over the super junction structure, reducing charge imbalance and improving the trade-off between on-state resistance and breakdown voltage, enabling more efficient manufacturing of super junction semiconductor devices.
Implementation Method 1
implanting first dopants of a first conductivity type into the semiconductor layer based on a first tilt angle α1 between an ion beam direction and a process surface normal and based on a first twist angle ω1 between a first lateral direction and a projection of the ion beam direction on the process surface
Implementation Method 2
increasing a thickness of the semiconductor layer by forming an epitaxial layer
Data Source
AI summary
A semiconductor device is manufactured by: i) forming a mask on a process surface of a semiconductor layer, elongated openings of the mask exposing part of the semiconductor layer and extending along a first lateral direction; ii) implanting dopants of a first conductivity type into the semiconductor layer based on tilt angle α1 between an ion beam direction and a process surface normal and based on twist angle ω1 between the first lateral direction and a projection of the ion beam direction on the process surface; iii) implanting dopants of a second conductivity type into the semiconductor layer based on tilt angle α2 between an ion beam direction and the process surface normal and based on twist angle ω2 between the first lateral direction and a projection of the ion beam direction on the process surface; and repeating i) to iii) at least one time.