Super Junction Semiconductor Device With Implanted Field Stop
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Solution Overview
Problem
Conventional super junction semiconductor devices face challenges in achieving low on-state and forward resistance due to high substrate resistance, especially in low-voltage applications, and high temperature budgets during manufacturing lead to less precise dopant profiles and zone boundaries.
Innovation Solution
The manufacturing process involves forming columnar super junction regions perpendicular to the surface, thinning the semiconductor substrate to within 30 μm of the surface, and implanting impurities to create a field stop structure with a low temperature budget, resulting in a steeper and thinner field stop structure that reduces on-resistance and improves precision in dopant profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing processes with high temperature budgets are used, then dopant profiles become less precise and zone boundaries become less sharp, but achieving low on-state and forward resistance becomes more difficult
Solution Approach 1:
The patent changes the temperature parameter from conventional high temperature processing to low temperature processing (below 900°C). This parameter change enables precise dopant profiling and sharp zone boundaries while achieving low on-state resistance through the specific low temperature implantation process that creates optimized dopant distributions without thermal diffusion broadening.
Solution Approach 2:
The patent replaces conventional thermal diffusion-based dopant introduction with ion implantation. This substitution eliminates thermal diffusion effects that broaden dopant profiles, allowing for sharper zone boundaries and more precise dopant concentration control, directly addressing the contradiction between manufacturing precision and device performance.
2Reliability
If the semiconductor substrate is not thinned, then the distance between super junction regions and the second surface is larger, but on-state and forward resistance remain high
Solution Approach 1:
The patent changes the geometric parameter of substrate thickness by thinning the semiconductor substrate to reduce the distance between super junction regions and the second surface to within 30 μm. This parameter change directly reduces the on-state and forward resistance by shortening the current path length through the drift layer, while the low temperature processing maintains the structural integrity of the thinned substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a super junction semiconductor device with significantly lower on-state and forward resistance, enhanced precision in dopant profiles, and improved switching behavior, while maintaining a robust reverse breakdown voltage.
Implementation Method 1
Impurities of the first conductivity type are implanted into the second surface to form one or more implanted zones
Data Source
AI summary
In a semiconductor substrate with a first surface and a working surface parallel to the first surface, columnar first and second super junction regions of a first and a second conductivity type are formed. The first and second super junction regions extend in a direction perpendicular to the first surface and form a super junction structure. The semiconductor portion is thinned such that, after the thinning, a distance between the first super junction regions having the second conductivity type and a second surface obtained from the working surface does not exceed 30 μm. Impurities are implanted into the second surface to form one or more implanted zones. The embodiments combine super junction approaches with backside implants enabled by thin wafer technology.