Super Junction Semiconductor Device Reducing On-Resistance
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Solution Overview
Problem
The existing semiconductor devices with conventional MOSFET structures face limitations in reducing on-resistance and improving breakdown voltage due to complex vertical channel designs and process complexities, especially for vertical diffusion metal oxide semiconductor devices.
Innovation Solution
A semiconductor device with a super junction structure is developed, featuring a charge-absorbing structure, insulating layer, and doped regions with alternating conductivity types, formed using a method that includes ion implantation and field oxide formation to precisely control doped regions, reducing channel length and enhancing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional MOSFET structure is used, then the device has simple manufacturing process, but the on-resistance cannot be reduced and breakdown voltage is limited
Solution Approach 1:
The semiconductor layer is divided into multiple alternating doped regions (first doped regions and second doped regions) with different conductivity types, forming a super junction structure. This segmentation allows independent control of charge distribution in each region, enabling on-resistance reduction while maintaining breakdown voltage through the alternating n-type and p-type columns that create multiple depletion regions.
Solution Approach 2:
Different regions of the semiconductor layer are doped with different conductivity types (n-type and p-type) to create localized charge absorption zones. The first doped regions and second doped regions have different doping concentrations and conductivity types, allowing each local region to contribute differently to the overall device performance, with some regions absorbing charge to reduce on-resistance while others maintain breakdown voltage.
2Reliability
If vertical diffusion metal oxide semiconductor device is used, then breakdown voltage can be improved, but process complexity increases
Solution Approach 1:
A charge-absorbing structure is formed on the substrate before forming the semiconductor layer. This preliminary charge-absorbing structure pre-establishes the charge distribution pattern needed for the super junction device, simplifying subsequent processing steps. The charge-absorbing structure is formed with a specific thickness (100nm-1000nm) and conductivity type to prepare the foundation for the alternating doped regions, reducing the complexity of forming the final super junction structure.
Solution Approach 2:
The charge-absorbing structure acts as an intermediary layer between the substrate and the semiconductor layer, facilitating the formation of the super junction structure. This intermediate layer with controlled thickness and conductivity type helps manage charge distribution during device operation, enabling breakdown voltage improvement while keeping the manufacturing process more manageable by providing a pre-configured charge management layer.
3Speed
If channel length is reduced to improve switching speed, then high-frequency characteristics improve, but breakdown voltage decreases
Solution Approach 1:
The invention transitions from controlling device characteristics primarily through vertical channel dimensions to utilizing horizontal lateral extension of alternating doped regions. The super junction structure extends alternating n-type and p-type regions laterally across the semiconductor layer, creating a two-dimensional charge distribution pattern. This lateral dimension allows independent optimization of channel length for speed while the extended alternating regions maintain breakdown voltage through their spatial arrangement and charge absorption capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces on-resistance and improves breakdown voltage, making the semiconductor device suitable for high-frequency applications and integration with RF ICs, while also reducing parasitic effects and scattering phenomena.
Implementation Method 1
a charge-absorbing structure disposed over a substrate
Implementation Method 2
implanting a portion of the semiconductor layer through the plurality of openings to form a plurality of first doped regions
Data Source
AI summary
A semiconductor device includes a charge-absorbing structure disposed over a substrate; an insulating layer disposed over the charge-absorbing structure; a semiconductor layer disposed over the insulating layer; a plurality of first doped regions and a plurality of second doped regions disposed in the semiconductor layer, wherein the first doped regions and second doped regions extend in a first direction and are alternately arranged along a second direction that is different than the first direction, and the plurality of first doped regions and the plurality of second doped regions have different conductivity types; a source and a drain disposed respectively on opposite sides of the plurality of first doped regions and the plurality of second doped regions and extend in the second direction; and a gate disposed on the plurality of first doped regions and the plurality of second doped regions and extends in the second direction.