Super Junction Semiconductor Terminal Region Field Control
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Solution Overview
Problem
Existing semiconductor devices with super junction structures face limitations in achieving higher withstanding voltage in the terminal region compared to the cell region, leading to potential breakdown due to local electric field concentration.
Innovation Solution
A semiconductor device design featuring a super junction structure with a terminal upper semiconductor layer of low impurity concentration, a terminal contact semiconductor region of high impurity concentration, and a layered insulation structure, where the insulation layer has a thin part adjacent to the cell region and a thicker part adjacent to the terminal contact semiconductor region, along with a conductive layer extending beyond the thin insulation layer, to enhance the depletion region height and reduce electric field concentration in the terminal region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the terminal region is designed with the same structure as the cell region, then manufacturing is simplified, but the withstanding voltage of the terminal region cannot exceed that of the cell region, leading to potential breakdown
Solution Approach 1:
The patent applies local quality by giving the terminal region a distinct structure different from the cell region. Specifically, the terminal region includes a terminal upper semiconductor layer with low impurity concentration and a terminal contact semiconductor region with high impurity concentration, while the cell region maintains the super junction structure. This localized structural differentiation enables the terminal region to achieve higher withstanding voltage without requiring complex modifications across the entire device.
Solution Approach 2:
The terminal region is segmented into multiple functional layers: the terminal upper semiconductor layer (low impurity concentration) and the terminal contact semiconductor region (high impurity concentration). This segmentation allows each layer to perform its specific function - the upper layer provides high breakdown voltage while the contact region ensures good electrical connection, thereby resolving the contradiction between reliability and structural simplicity.
2Reliability
If the insulation layer thickness is increased uniformly across the terminal region, then electric field concentration is reduced, but the depletion region height cannot be sufficiently increased to achieve the desired withstanding voltage
Solution Approach 1:
The insulation layer is designed with local quality through the terminal upper semiconductor layer, which has a uniform thickness and low impurity concentration. This localized structural feature with controlled thickness and material properties enables the depletion region to extend sufficiently to achieve the desired withstanding voltage while maintaining manufacturing feasibility.
3Loss of energy
If breakdown is induced in the cell region during avalanche testing, then avalanche energy per unit area is reduced, but the terminal region must be designed with significantly higher withstanding voltage, increasing device complexity
Solution Approach 1:
The terminal region employs local quality through the combination of the terminal upper semiconductor layer (low impurity concentration) and terminal contact semiconductor region (high impurity concentration). This localized structural design achieves the required higher withstanding voltage in the terminal region, enabling breakdown to occur in the cell region during avalanche testing and thereby reducing avalanche energy per unit area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively increases the withstanding voltage of the terminal region beyond that of the cell region, reducing the likelihood of breakdown and improving the semiconductor device's overall performance by controlling the depletion region height and local electric field concentration.
Implementation Method 1
a depleted region (meaning an expansion area of a depletion layer when the semiconductor device is turned off) can be formed in a wide area of the terminal region, and consequently withstanding voltage of both of the cell region and the terminal region can be improved
Implementation Method 2
when an insulating layer whose thickness is increased stepwise is used, an electric field near a boundary between the cell region and the terminal region, in which the electric field tends to be concentrated, can be reduced
Data Source
AI summary
A semiconductor device includes: a cell region; a terminal region; a lower semiconductor layer; a intermediate semiconductor layer on the lower semiconductor layer including a super junction structure; a terminal upper semiconductor layer on the intermediate semiconductor layer; a terminal contact semiconductor region on a surface portion of the terminal upper semiconductor layer adjacent to the cell region; an insulation layer on the terminal upper semiconductor layer having a first part adjacent to the cell region with a small thickness and a second part adjacent to the first part with a large thickness; and a conductive layer in the cell region and a part of the terminal region, the conductive layer extending from the cell region to the part of the terminal region beyond the first part of the insulation layer.