Super Junction VDMOSFET Fabrication via Single Epitaxy
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Solution Overview
Problem
Conventional VDMOSFETs with super junction structures face limitations in reducing on-resistance (Ron) and increasing breakdown voltage due to high fabrication costs and complexity in multi-epitaxy technology, which also makes it difficult to miniaturize the devices.
Innovation Solution
A method for fabricating a semiconductor device with a super junction structure involving the formation of epitaxial layers, trenches filled with insulating materials, and doped regions with different conductivity types and diffusivities, reducing the number of epitaxy growth processes and allowing for improved charge balance and reduced on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-epitaxy technology is used to fabricate super junction structure, then breakdown voltage is improved, but fabrication cost and device complexity increase
Solution Approach 1:
The patent extracts and eliminates the need for multiple epitaxy growth processes by forming the super junction structure through a single epitaxial layer followed by selective doping processes. This removes the complex multi-epitaxy steps while maintaining the breakdown voltage performance through alternative doping-based structure formation.
Solution Approach 2:
The patent changes the fabrication approach from controlling structure through multiple epitaxial growth parameters to controlling structure through doping parameters (diffusivity, concentration, depth). By using dopants with different diffusivities in a single epitaxial layer, the super junction structure is achieved with simplified process parameters.
2Reliability
If multi-epitaxy technology is used to fabricate super junction structure, then breakdown voltage is improved, but fabrication cost increases
Solution Approach 1:
The patent removes the expensive multi-epitaxy growth steps and replaces them with more cost-effective single epitaxial growth followed by standard doping processes, thereby reducing fabrication cost while maintaining breakdown voltage performance.
Solution Approach 2:
The patent uses a single epitaxial layer that serves multiple functions, replacing the need for multiple expensive epitaxial layers. This disposable-like approach where one layer performs multiple roles reduces material and process costs.
3Ease of manufacture
If conventional VDMOSFET structure is used, then manufacturing is simple, but on-resistance is high
Solution Approach 1:
The patent applies local quality by creating regions with different doping concentrations and types within the single epitaxial layer. The super junction structure with alternating n-type and p-type doped regions provides locally optimized properties that reduce on-resistance while maintaining manufacturability.
Solution Approach 2:
The patent creates a composite doped region structure within the single epitaxial layer, combining different dopant types and concentrations to form a composite material system that achieves low on-resistance through the super junction effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves reduced on-resistance and increased breakdown voltage while lowering fabrication costs and enabling smaller device sizes by optimizing doping concentrations and trench structures, thereby enhancing the performance and efficiency of semiconductor devices.
Implementation Method 1
the first dopant has diffusivity larger than that of the second dopant
Data Source
AI summary
A semiconductor device including a semiconductor substrate of a first conductivity type and an epitaxial layer of the first conductivity type disposed thereon is disclosed. Pluralities of first and second trenches are alternately arranged in the epitaxial layer. First and second doped regions of the first conductivity type are formed in the epitaxial layer and surrounding each first trench. A third doped region of a second conductivity type is formed in the epitaxial layer and surrounding each second trench. A first dopant in the first doped region has diffusivity larger than that of a second dopant in the second doped region. A method for fabricating a semiconductor device is also disclosed.