Super-Node Bit-Flipping Decoder for Irregular Code Correction

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Solution Overview

Problem

Existing bit-flipping decoders struggle with correcting errors in memory systems, particularly for irregular codes and high-degree nodes, due to insufficient external connections for precise flipping energy calculations.

Innovation Solution

The proposed solution involves a bit-flipping decoder that treats multiple bits as a super node, calculating flipping energy based on both component nodes and internal checks, and flipping bits only when the super node's flipping energy exceeds a threshold, thereby improving error correction performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional bit-flipping decoder is used with component nodes, then the decoding process is simple, but the error correction capability is insufficient for irregular codes and high-degree nodes

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoder structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple component nodes are merged to form a super node, which aggregates the flipping energy information from individual component nodes. This merging enables the decoder to achieve better error correction capability by considering collective node behavior, particularly for irregular codes and high-degree nodes where individual node analysis is insufficient.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from analyzing individual component nodes (one-dimensional approach) to analyzing super nodes that encompass multiple components (multi-dimensional approach). This dimensional change allows the decoder to capture complex error patterns and achieve improved correction performance for challenging code structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If multiple component nodes are grouped into a super node, then the flipping energy calculation becomes more accurate, but the computational complexity increases

Engineering Contradiction:
Improveflipping energy calculation accuracyVSAvoidcalculation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies partial action by focusing the super node approach specifically on irregular codes and high-degree nodes where it provides the most benefit, rather than uniformly applying it to all nodes. This selective application improves flipping energy calculation accuracy for critical cases while limiting the increase in overall computational complexity.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If super node approach is used with internal checks, then the connectivity and error detection capability improve, but the decoding iteration time increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoiddecoding iteration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent incorporates internal checks within super nodes that provide feedback information about the consistency and validity of flipping decisions. This feedback mechanism improves error detection capability by verifying whether proposed bit flips are consistent with the code structure, while the feedback is designed to be computationally efficient to minimize additional iteration time.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12294385B1Bit-flipping decoder and decoding method based on super node
Publication Date: 2025.05.06 SK HYNIX INC
  • US12294385B1 patent drawing
  • US12294385B1 patent drawing
  • US12294385B1 patent drawing

AI summary

A bit-flipping (BF) decoder and a decoding method based on a super node, which groups two or more component nodes corresponding to two or more bits in a codeword to generate a super node; and performs a decoding iteration on the super node. The decoding iteration includes: calculating a flipping energy for the super node based on a flipping energy for each of the component nodes and internal checks between the component nodes; and flipping at least one of the two or more bits in the super node upon a determination that the flipping energy for the super node exceeds a bit-flipping threshold.