Super Via PDN Layout for Uniform Current Distribution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power delivery networks in integrated circuits experience non-uniform current distribution due to unequal power demands across devices, leading to clock skew, as traditional vias connect only adjacent metal layers and introduce resistance, affecting current flow.
Innovation Solution
The placement of super vias, which connect non-adjacent metal layers, is determined based on the power demands of devices, allowing for a more uniform current distribution by replacing traditional vias with super vias that provide higher current flow to devices with greater power demands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional vias connecting only adjacent metal layers are used, then the power delivery network structure is simple, but non-uniform current distribution occurs leading to clock skew
Solution Approach 1:
The via structure is segmented into traditional vias for general power delivery and super vias for high-current paths. This segmentation allows the system to maintain simple traditional via structures for most connections while introducing complex super vias only where needed to achieve uniform current distribution and eliminate clock skew.
Solution Approach 2:
Different via structures are applied to different locations based on local power demands. Super vias with lower resistance are placed strategically at locations requiring higher current flow, while traditional vias suffice for other areas. This local differentiation resolves the contradiction by optimizing current uniformity only where necessary.
2Reliability
If super vias connecting non-adjacent metal layers are introduced, then current distribution uniformity improves, but the power delivery network complexity increases
Solution Approach 1:
The power delivery network dynamically adapts its structure by selectively replacing traditional vias with super vias based on identified high-current requirements. This dynamic approach ensures clock skew reduction through improved current uniformity while minimizing overall network complexity by maintaining traditional via structures where they remain sufficient.
3Ease of manufacture
If traditional vias are used throughout the power delivery network, then manufacturing is simpler, but resistance-related issues affect current flow
Solution Approach 1:
The via structure parameters are changed by introducing super vias with different geometric characteristics (larger cross-sectional area, extended vertical connectivity) that provide lower resistance paths. This parameter change improves current flow efficiency in critical areas while maintaining standard via parameters elsewhere to preserve manufacturing simplicity.
4Power
If super vias are strategically placed based on power demand analysis, then power delivery efficiency improves, but the design and placement process becomes more complex
Solution Approach 1:
Power demand analysis is performed preliminarily during the design phase to identify locations requiring super vias before actual placement. This preliminary action enables strategic positioning of super vias to maximize power delivery efficiency while managing placement complexity through systematic analysis rather than trial-and-error approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces clock skew by ensuring a more uniform current distribution across devices, enhancing power delivery and reducing resistance-related issues in the power delivery network.
Implementation Method 1
a super via that is configured to connect non-adjacent metal layers of the plurality of metal layers
Data Source
AI summary
Embodiments include super via placement in the development of an integrated circuit. Aspects of the invention include obtaining a power distribution network for the integrated circuit (IC) IC, wherein the PDN includes a plurality of metal vias each configured to connect adjacent metal layers of a plurality of metal layers. Aspects also include placing one or more cells on each metal layer of the IC and identifying a power demand associated with each of the one or more cells. Aspects further include updating the PDN, based on the power demand associated with each of the one or more cells, to replace at least two of the plurality of metal vias with a super via that is configured to connect non-adjacent metal layers of the plurality of metal layers.


