Supercomputer-Mainframe Memory Hierarchy Integration

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Solution Overview

Problem

Mainframe computer systems face challenges in handling massive data processing and meeting dynamic response time demands, limiting their ability to perform computationally intensive tasks efficiently.

Innovation Solution

Integrating a supercomputer with faster processing capabilities into the memory hierarchy of a mainframe computer system, allowing for parallel processing and efficient data management through Ethernet connections, enabling the supercomputer to handle data processing tasks that would otherwise overwhelm the mainframe.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If mainframe computer systems are used to handle massive data processing, then reliability and stability are maintained, but processing speed and response time are insufficient

Engineering Contradiction:
Improveprocessing speedVSAvoidsystem complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system is segmented into two distinct parts: a mainframe computer for stable data storage and management, and a supercomputer for high-speed processing. This segmentation allows each component to specialize in its strength while working together through defined interfaces, resolving the contradiction between speed and complexity by distributing functions across separate systems.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An interface layer acts as an intermediary between the mainframe and supercomputer, managing data transfer and coordination. This intermediary enables the two systems with different architectures to communicate efficiently, allowing the mainframe to leverage the supercomputer's processing speed without directly integrating their complex internal structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If mainframe computer systems process computationally intensive tasks, then system simplicity is maintained, but productivity and processing capacity are limited

Engineering Contradiction:
Improveprocessing capacityVSAvoidsystem architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system merges the mainframe's reliable data management capabilities with the supercomputer's high processing capacity through a coordinated architecture. This merging allows the combined system to achieve productivity levels neither system could attain alone, while the interface layer prevents the complexity from becoming unmanageable by providing clear boundaries and protocols.

Inventive Principle:
Principle #5Merging (Combining)

3Loss of time

If mainframe computers handle dynamic response time demands, then operational stability is maintained, but response time and processing speed are insufficient

Engineering Contradiction:
Improveresponse timeVSAvoidoperational simplicity
Core Design Contradiction:
Loss of timeVSEase of operation

Solution Approach 1:

The system performs preliminary actions by pre-processing data and preparing computations on the supercomputer while the mainframe manages data storage. This preliminary action on the supercomputer reduces the time needed for final processing and response generation, while the mainframe continues to operate with its familiar stable architecture, maintaining ease of operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10740274B2Replacing mechanical/magnetic components with a supercomputer
Publication Date: 2020.08.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10740274B2 patent drawing
  • US10740274B2 patent drawing
  • US10740274B2 patent drawing

AI summary

A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.