Superconducting Circuit Elements Using Compressive Thin-Film Strain

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Solution Overview

Problem

The cooling of superconducting circuit elements below their critical temperature is costly, posing a challenge in the development of efficient and cost-effective superconductor electronics.

Innovation Solution

The development of room temperature superconducting circuit elements using an under compression room temperature (UC-RT) superconductor material embedded in a piezoelectric or ferroelectric thin film, where actuation of the thin film applies compressive stress to the superconductor material, enabling superconductivity at room temperature.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If superconducting circuit elements are cooled below their critical temperature to achieve superconductivity, then superconducting performance is improved, but operational cost increases

Engineering Contradiction:

Improvesuperconducting performanceVSAvoidcooling cost

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent applies compressive strain to the superconducting material (changing the mechanical parameter) to enable room temperature superconductivity. This parameter change allows the material to achieve superconducting state without the need for cryogenic cooling, thus resolving the contradiction between maintaining superconducting performance and reducing cooling costs

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses composite structures where piezoelectric or ferroelectric materials are combined with superconducting materials. The piezoelectric/ferroelectric layer generates compressive strain when actuated, which is transferred to the superconducting material to induce room temperature superconductivity, eliminating the need for expensive cooling systems

Inventive Principle:

Principle #40Composite materials

2Use of energy by stationary object

If compressive stress is applied to UC-RT superconductor material to achieve room temperature superconductivity, then cooling cost is reduced, but device complexity increases

Engineering Contradiction:

Improvecooling costVSAvoiddevice structure

Core Design Contradiction:

Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the piezoelectric/ferroelectric material with the superconducting material in a single integrated structure. The piezoelectric/ferroelectric layer serves dual purposes: as a structural layer and as a strain actuator, eliminating the need for separate cooling infrastructure and reducing overall device complexity despite the addition of functional layers

Inventive Principle:

Principle #5Merging (Combining)

3Temperature

If UC-RT superconductor material is embedded in thin film with circuit element openings, then room temperature operation is enabled, but manufacturing precision requirements increase

Engineering Contradiction:

Improveoperating temperatureVSAvoidthin film fabrication

Core Design Contradiction:

TemperatureVSManufacturing precision

Solution Approach 1:

The patent segments the superconducting material into discrete regions within the thin film, placing UC-RT superconductor material specifically within circuit element openings while leaving other areas as piezoelectric/ferroelectric material. This segmentation allows for controlled strain application and enables room temperature operation while managing manufacturing precision through standardized fabrication processes

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the creation of efficient room temperature superconducting circuit elements without the need for costly cooling, thereby reducing operational expenses and enhancing the feasibility of superconductor electronics.

Implementation Method 1

the thin film is a piezoelectric thin film or a ferroelectric thin film, and actuation of the thin film applies a compressive stress on the UC-RT superconductor material

Methodology Applied

Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 2

actuation of the thin film applies a compressive stress on the UC-RT superconductor material such that a RT superconducting circuit element is formed

Methodology Applied

Scientific EffectCompressive stress: Compression

Implementation Method 3

UC-RT superconductor material disposed at least partially within the thin film... such that a RT superconducting circuit element is formed

Methodology Applied

Scientific EffectSuperconductivity: Superconductivity

Data Source

PatentUS12308833B1Room temperature superconducting circuit elements and methods of manufacturing the same

Publication Date: 2025.05.20 TOYOTA JIDOSHA KK

AI summary

A superconducting circuit element includes a piezoelectric or ferroelectric thin film formed on a rigid substrate. The piezoelectric or ferroelectric thin film has one or more circuit element openings and an under compression room temperature superconductor material disposed within the one or more circuit element openings. Actuation of the thin film applies a compressive stress on the under compression room temperature superconductor material such that a room temperature superconducting circuit element is formed on the rigid substrate.