Superconducting Logic Cell Arrays With AC Clocked Josephson Junctions
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Solution Overview
Problem
CMOS technology-based digital circuits face limitations in device size reduction and high power consumption, especially due to static power dissipation and current leakage, even when inactive, leading to inefficiencies in high-performance digital systems.
Innovation Solution
The use of superconducting logic devices with Josephson junctions, powered by alternating current, which eliminate static power dissipation and enable low-power operation through reciprocal quantum logic circuits that process inputs during specific clock phases, utilizing AC power for both power and clocking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If CMOS technology is used for digital circuits, then device functionality and processing capability are achieved, but power consumption increases due to static power dissipation and current leakage
Solution Approach 1:
The patent changes the fundamental operating parameters of the logic circuit by transitioning from CMOS technology to superconducting logic technology. This involves changing the material state from semiconductor to superconductor, altering the power supply from DC to AC, and operating at cryogenic temperatures to achieve zero static power dissipation and eliminate current leakage
Solution Approach 2:
The patent replaces the semiconductor-based CMOS mechanical/electrical system with a superconducting quantum logic system that uses Josephson junctions. This substitution eliminates the need for DC bias currents and ground returns, replacing them with AC-powered superconducting circuits that operate without static power consumption
2Area of moving object
If CMOS circuits are made smaller to increase integration density, then device size reduction is achieved, but power consumption and manufacturing complexity increase
Solution Approach 1:
The patent changes the operating temperature parameter to cryogenic levels where superconducting materials operate, enabling high integration density without the power consumption penalties associated with scaled CMOS. The superconducting logic cells can be densely packed while maintaining zero static power dissipation
Solution Approach 2:
The patent divides the logic circuit into discrete superconducting logic cells that can be independently configured and arranged. Each cell contains Josephson junctions that can be precisely positioned, allowing for high-density integration while maintaining low power consumption through the superconducting state
3Loss of energy
If AC power is used for superconducting logic circuits, then static power dissipation is eliminated, but clocking complexity increases
Solution Approach 1:
The patent makes the AC power supply serve multiple functions simultaneously: it provides both the operating power for the superconducting circuits and the clocking signal. The AC voltage applied to the Josephson junctions performs dual roles as power source and timing reference, eliminating the need for separate DC power supplies and clock generators
Solution Approach 2:
The patent merges the power supply function and clocking function into a single AC signal source. The AC voltage applied to the superconducting logic cells provides both the energy needed for operation and the periodic timing signal required for synchronous logic operation, simplifying the overall system architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and eliminates static power dissipation, enabling efficient processing with zero static power dissipation and low power loss, even when inactive, by using AC power and Josephson junctions in superconducting logic circuits.
Implementation Method 1
Each of the superconducting logic cells may include at least one Josephson junction configured to change its state based on at least one of: (1) a first biasing condition caused by the first phase of the first clock or (2) a second biasing condition caused by the second phase of the second clock
Implementation Method 2
The use of superconducting logic devices with Josephson junctions, powered by alternating current, which eliminate static power dissipation and enable low-power operation
Data Source
AI summary
A device including an array of superconducting logic cells, where each of the superconducting logic cells is configured to receive at least one input and provide at least one output, is provided. Each of the superconducting logic cells includes at least one Josephson junction, whose state changes based on at least a biasing condition caused by a phase of a first clock or a phase of a second clock. The array of the superconducting logic cells is configured to perform at least one operation based at least on a connection arrangement of the array of the superconducting logic cells.