Superconducting Qubit Layout for Pseudo-2D Surface Codes

Solution Overview

Problem

Current methods for scaling up superconducting quantum circuits for error correction, such as surface code and topological one-way quantum computation, face challenges in configuring three-dimensional structures with two-dimensional quantum bit arrays and control wiring, making it difficult to produce large-scale superconducting circuits with error correction functions.

Innovation Solution

A quantum computing system is designed with alternating staggered arrangements of quantum bit groups and control wiring formed in two-dimensional or pseudo-two-dimensional configurations to enable the generation of two-dimensional or three-dimensional cluster states, allowing for surface code realization with pseudo-two-dimensional superconducting circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If three-dimensional superconducting circuit structure with perpendicular control wiring is used to scale up surface code implementations, then error correction capability is improved, but device complexity and manufacturing difficulty increase significantly

Engineering Contradiction:

Improveerror correction capabilityVSAvoidcircuit structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from traditional three-dimensional vertical wiring to a pseudo-two-dimensional wiring architecture where control lines are routed along the same substrate plane as qubits. This dimensional reconfiguration eliminates the need for vertical through-substrate vias while maintaining full connectivity, thereby reducing manufacturing complexity and improving scalability without sacrificing error correction capabilities.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If three-dimensional superconducting circuit structure with perpendicular control wiring is used to scale up surface code implementations, then error correction capability is improved, but ease of manufacture deteriorates

Engineering Contradiction:

Improveerror correction capabilityVSAvoidcircuit fabrication ease

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent transitions from traditional three-dimensional vertical wiring to a pseudo-two-dimensional wiring architecture where control lines are routed along the same substrate plane as qubits. This dimensional reconfiguration eliminates the need for vertical through-substrate vias while maintaining full connectivity, thereby reducing manufacturing complexity and improving scalability without sacrificing error correction capabilities.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If cluster state machine gun method using quantum dots is used to generate cluster states, then topological one-way quantum computation is enabled, but adaptability to superconducting circuit architecture is reduced

Engineering Contradiction:

Improvequantum computation method applicabilityVSAvoidarchitecture compatibility

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent replaces the quantum dot-based cluster state generation mechanism with a superconducting circuit implementation using microwave photons and Josephson junctions. This substitution enables topological one-way quantum computation to be performed on superconducting architectures by generating cluster states through controlled photon emission and entanglement operations native to superconducting qubits, thereby achieving cross-platform adaptability.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11980107B2Quantum computing system and method of using quantum computing system

Publication Date: 2024.05.07 TOKYO UNIVERSITY OF SCIENCE

AI summary

A quantum computing system including plural base configurations each configured including a first quantum bit group configured from first quantum bits arranged so as to form a single column without mutual coupling, a second quantum bit group configured from second quantum bits arranged so as to form a single column with adjacent ones of the second quantum bits coupled together and each of the second quantum bits coupled to the first quantum bit that is arranged in a same row, and a third quantum bit coupled to all of the second quantum bits. The plural base configurations are arranged so as to form a single column with the third quantum bits in adjacent ones of the base configurations coupled together. In a quantum computing circuit configuration, a two-dimensional cluster state or a three-dimensional cluster state is accordingly realized with two-dimensional control wiring, or surface code is accordingly realized with a pseudo two-dimensional superconducting circuit.