Super-junction Semiconductor Device Field Oxide Edge Design

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Solution Overview

Problem

The existing super-junction structure in semiconductor devices faces challenges in maintaining high breakdown voltage and low ON-resistance due to local electric field concentrations at the periphery region, particularly at the end portion of the field oxide film, where the iso-potential surfaces are excessively narrowed, leading to discontinuities and reduced dielectric strength.

Innovation Solution

Avoiding the formation of p-type column regions beneath the end portion of the field oxide film in the periphery region and providing column regions under the element isolation region to maintain continuous iso-potential surfaces, thereby suppressing electric field concentration and ensuring stable high breakdown voltage and low ON-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If p-type column regions are formed beneath the end portion of the field oxide film in the periphery region, then the breakdown voltage is improved, but local electric field concentration occurs at the periphery region causing discontinuities in iso-potential surfaces

Engineering Contradiction:
Improvebreakdown voltageVSAvoidelectric field concentration
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by differentiating the treatment of column regions in different areas: in the element forming region, p-type column regions are formed to enhance breakdown voltage, while in the periphery region at the end portion of the field oxide film, column regions are intentionally omitted to prevent electric field concentration. This spatial differentiation of structural properties resolves the contradiction between achieving high breakdown voltage and avoiding harmful electric field concentration.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the semiconductor device into distinct regions with different column region configurations: the element forming region with regular p-type column regions for high breakdown voltage, and the periphery region at the field oxide film end portion without column regions to avoid electric field concentration. This segmentation allows each region to be optimized for its specific functional requirements.

Inventive Principle:
Principle #1Segmentation

2Reliability

If p-type column regions are formed in the periphery region, then the dielectric strength is stabilized, but iso-potential surfaces are excessively narrowed leading to discontinuities

Engineering Contradiction:
Improvedielectric strength stabilityVSAvoidiso-potential surface continuity
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies local quality by differentiating the treatment of column regions in different areas: in the element forming region, p-type column regions are formed to enhance breakdown voltage, while in the periphery region at the end portion of the field oxide film, column regions are intentionally omitted to prevent electric field concentration. This spatial differentiation of structural properties resolves the contradiction between achieving high breakdown voltage and avoiding harmful electric field concentration.

Inventive Principle:
Principle #3Local quality

3Loss of energy

If impurity concentration of the n-type drift region is raised to lower ON-resistance, then the ON-resistance is reduced, but the breakdown voltage decreases

Engineering Contradiction:
ImproveON-resistanceVSAvoidbreakdown voltage
Core Design Contradiction:
Loss of energyVSStrength

Solution Approach 1:

The patent segments the semiconductor device into distinct regions with different column region configurations: the element forming region with regular p-type column regions for high breakdown voltage, and the periphery region at the field oxide film end portion without column regions to avoid electric field concentration. This segmentation allows each region to be optimized for its specific functional requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs parameter changes by carefully controlling the impurity concentration and physical dimensions of the p-type column regions in the element forming region. By optimizing these parameters, the patent achieves a balance where the column regions provide sufficient electric field modulation to maintain high breakdown voltage while allowing the n-type drift region to have higher impurity concentration for lower ON-resistance.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively prevents excessive narrowing of iso-potential surfaces, reducing electric field concentration and enhancing the semiconductor device's breakdown voltage stability while maintaining low ON-resistance, achieving high performance in the super-junction structure.

Implementation Method 1

depletion layers extend from two p-n junctions between the p-type base region 15 and the n-type drift region 14, and between the p-type column region 16 and the n-type drift region 14

Methodology Applied
Scientific EffectElectric field modulation: Electric Field

Implementation Method 2

each depletion layer extends from the boundary, so that depletion occurred to as wide as distance 'd' shown in FIG. 11 results in depletion of the entire portion of the p-type column region 16 and the n-type drift region 14

Methodology Applied
Scientific EffectDepletion layer formation: Electric Field

Data Source

PatentUS8035158B2Semiconductor device
Publication Date: 2011.10.11 RENESAS ELECTRONICS CORP
  • US8035158B2 patent drawing
  • US8035158B2 patent drawing
  • US8035158B2 patent drawing

AI summary

Aiming at realizing high breakdown voltage and low ON resistance of a semiconductor device having the super-junction structure, the semiconductor device of the present invention has a semiconductor substrate having an element forming region having a gate electrode formed therein, and a periphery region formed around the element forming region, and having an field oxide film formed therein; and a parallel p-n layer having n-type drift regions and p-type column regions alternately arranged therein, formed along the main surface of the semiconductor substrate, as being distributed over the element forming region and a part of the periphery region, wherein the periphery region has no column region formed beneath the end portion on the element forming region side of the field oxide film and has p-type column regions as at least one column region formed under the field oxide film.