Superjunction Transistor Doping Profile for Edge Avalanche Control
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Solution Overview
Problem
Existing superjunction transistor devices often have a lower voltage blocking capability in the inner region compared to the edge region, leading to undesirable Avalanche breakdown in the inner region with a greater area and volume.
Innovation Solution
The method involves forming a semiconductor body with a plurality of first and second doping type regions in both the inner and edge regions, creating transistor cells with body and source regions, and implementing a buffer region between the drain and these regions, with a dopant dose that decreases towards the edge surface, and using a protection layer to control dopant implantation in the edge region to achieve a higher voltage blocking capability in the edge region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the voltage blocking capability in the inner region is lower than in the edge region, then Avalanche breakdown occurs in the inner region, but this leads to reduced device robustness and performance
Solution Approach 1:
The patent applies local quality by creating different dopant dose distributions in different regions of the semiconductor body. The inner region has a higher dopant dose in the drift region to enable lower voltage blocking capability and controlled Avalanche breakdown, while the edge region has a lower dopant dose to achieve higher voltage blocking capability. This spatial variation in doping concentration optimizes both regions for their respective functions, improving overall device robustness.
Solution Approach 2:
The patent changes the dopant dose parameter across different regions and depths of the semiconductor body. By adjusting the dopant concentration in the drift region of the inner region versus the edge region, the voltage blocking capability is tuned to achieve the desired Avalanche breakdown behavior. The dopant dose decreases from the inner region toward the edge region, creating the intended voltage blocking capability gradient.
2Ease of manufacture
If the dopant dose is uniform across the inner and edge regions, then manufacturing is simplified, but the voltage blocking capability cannot be differentiated between regions
Solution Approach 1:
The patent implements local quality through selective dopant implantation strategies. Different dopant doses are applied to the inner region versus the edge region, and different implantation depths are utilized. This allows the manufacturing process to create region-specific electrical characteristics while still using standard semiconductor fabrication techniques, balancing manufacturing feasibility with performance optimization.
Solution Approach 2:
The patent segments the dopant implantation process into distinct steps for the inner region and edge region. By treating these regions separately during fabrication—applying different dopant doses and implantation conditions—the patent achieves differentiated voltage blocking capabilities without requiring completely separate manufacturing lines, thus maintaining reasonable manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the voltage blocking capability in the edge region, ensuring Avalanche breakdown occurs in the edge region with a larger area, thereby improving the robustness and performance of the superjunction transistor device.
Implementation Method 1
forming a plurality of trenches in the inner region and the edge region and implanting dopant atoms into a first sidewall and a second sidewall of each of the plurality of trenches
Implementation Method 2
when a voltage is applied between the drain region and the source regions that reverse biases pn-junctions between the body regions or compensation regions and the drift regions, depletion regions (space charge regions) expand in the drift and compensation region. These depletion regions are associated with an electric field.
Implementation Method 3
An Avalanche breakdown may occur when the voltage applied between the drain region and the source regions is such that a magnitude of the electric field reaches a critical value.
Data Source
AI summary
A method and a transistor device are disclosed. The transistor device includes: a semiconductor body; first regions of a first doping type and second regions of a second doping type in an inner region and an edge region of the semiconductor body; transistor cells in the inner region of the semiconductor body, each transistor cell including a body region and a source region, the transistor cells including a common drain region; and a buffer region arranged between the drain region and the first and second regions. A dopant dose in the first and second regions decreases towards an edge surface of the semiconductor body. A dopant dose in the buffer region decreases towards the edge surface.