Superjunction MOS Structure for Uniform RF Output Capacitance
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Solution Overview
Problem
Superjunction power MOS devices face operational challenges in radio-frequency applications due to parasitic components, particularly an inflection region in the output capacitance plot that causes them to malfunction at desired resonance frequencies, leading to subharmonic operation instead of the intended frequency.
Innovation Solution
The introduction of an interruption portion in the drift region between the first and second columns of the superjunction power MOS device, and the incorporation of intermediate regions between the first columns and body regions, which modifies the output capacitance plot to be more uniform, similar to planar devices, thereby improving high-frequency behavior.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If superjunction power MOS devices are used to achieve low on-resistance and high breakdown voltage, then power efficiency is improved, but parasitic components cause malfunction at desired resonance frequencies
Solution Approach 1:
The drift region is segmented into multiple portions (first drift region, second drift region, third drift region) with different doping concentrations arranged in alternating columns. This segmentation creates the superjunction structure that enables low on-resistance while controlling parasitic capacitance through the specific doping profile distribution.
Solution Approach 2:
Different regions of the drift region are assigned different doping concentrations to achieve local optimization. The first drift region has higher doping concentration near the body region to control parasitic capacitance, while the second and third drift regions have lower doping concentrations to maintain low on-resistance and high breakdown voltage.
2Loss of energy
If superjunction structure is implemented to reduce on-resistance, then power efficiency improves, but output capacitance plot shows inflection region causing subharmonic operation
Solution Approach 1:
The doping concentration parameter is varied across different drift region portions. The first drift region has doping concentration of 1×10^12 to 1×10^13 atoms/cm³, while the second and third drift regions have lower doping concentrations of 1×10^11 to 1×10^12 atoms/cm³. This parameter change eliminates the inflection region in the output capacitance plot.
Solution Approach 2:
The patent introduces a vertical dimension to the doping concentration profile by creating multiple drift regions at different depths. The first drift region is adjacent to the body region, the second drift region is above the first, and the third drift region is above the second, creating a layered structure that controls capacitance characteristics.
3Loss of energy
If drift region doping concentration is reduced to lower on-resistance, then power efficiency improves, but breakdown voltage decreases
Solution Approach 1:
The drift region is divided into multiple segments with different doping concentrations. Lower doping concentrations in the second and third drift regions reduce on-resistance, while the specific arrangement and doping concentration of the first drift region maintains the electric field distribution necessary for high breakdown voltage.
Solution Approach 2:
The drift region employs a composite doping structure with multiple materials or doping levels. The alternating columns of differently doped regions create a composite structure that combines the benefits of low on-resistance (from lower doping regions) and high breakdown voltage (from the overall charge balance and electric field distribution).
Data Source
AI summary
A semiconductor MOS device having an epitaxial layer with a first conductivity type formed by a drain region and by a drift region. The drift region accommodates a plurality of first columns with a second conductivity type and a plurality of second columns with the first conductivity type, the first and second columns alternating with each other and extending on the drain region. Insulated gate regions are each arranged on top of a respective second column; body regions having the second conductivity type extend above and at a distance from a respective first column, thus improving the output capacitance Cds of the device, for use in high efficiency RF applications.