Super-junction Trench MOSFET Compact Termination Design
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Solution Overview
Problem
Conventional super-junction trench MOSFETs have longer termination areas, which occupy more space and increase costs, limiting their integration and efficiency in semiconductor power devices.
Innovation Solution
A super-junction trench MOSFET design with a termination area of approximately 20 um in length, featuring a novel cell structure with P/N charge balance areas, doped column regions, and a method for manufacturing that includes forming deep trenches, dielectric material deposition, and specific doping and etching processes to reduce termination length and enhance device compactness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional super-junction trench MOSFET structure with multiple guard rings is used, then breakdown voltage and specific Rds performance are improved, but termination area length increases to about 200 um occupying more space
Solution Approach 1:
The patent changes the structural parameters of the termination area by replacing multiple guard rings with a simplified structure comprising a first termination region with first-type doped columns and a second termination region with second-type doped columns. This parameter change reduces the termination area length from 200 um to approximately one-tenth of that length while maintaining the breakdown voltage and specific Rds performance through optimized doping column arrangements and charge balance areas.
Solution Approach 2:
The termination area is segmented into distinct first and second termination regions with different doped column types, allowing each region to perform specific functions. The first termination region with first-type doped columns and the second termination region with second-type doped columns work together to achieve the required electrical performance with reduced overall length, eliminating the need for multiple guard rings.
2Reliability
If conventional super-junction trench MOSFET with multiple guard rings is used, then device performance is maintained, but device size increases reducing integration efficiency
Solution Approach 1:
The patent applies parameter changes by modifying the termination structure from multiple guard rings to a compact two-region design with doped columns. This reduces the device area while maintaining performance through optimized doping concentrations, column dimensions, and spatial arrangements that preserve the electrical characteristics without requiring extensive termination length.
Solution Approach 2:
The patent transitions from a planar guard ring structure to a vertical doped column structure extending into the substrate. This dimensional change allows the termination function to be achieved through depth rather than lateral extent, significantly reducing the device footprint while maintaining the necessary breakdown voltage and performance characteristics.
3Reliability
If conventional super-junction trench MOSFET structure is used, then electrical performance is achieved, but manufacturing cost increases due to larger device size
Solution Approach 1:
The patent changes manufacturing parameters by eliminating the complex multiple guard ring structure and replacing it with a simpler two-region doped column structure. This parameter change reduces manufacturing steps, material usage, and device area, thereby lowering production costs while maintaining the required electrical performance through optimized doping profiles and column geometries.
Solution Approach 2:
The patent extracts and removes the unnecessary multiple guard ring structures from the conventional design, retaining only the essential termination functions through the simplified first and second termination regions. This extraction eliminates redundant manufacturing steps and reduces device complexity, leading to cost-effective production while preserving electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design results in a more compact, cost-effective super-junction trench MOSFET with shorter termination length, improving integration and application flexibility while maintaining high breakdown voltage and low specific Rds resistance.
Implementation Method 1
a first type charge balance area consist of two P/N charge balance areas formed in the mesa area between adjacent deep trenches
Implementation Method 2
at least one gate trench filled with doped poly-silicon layer padded by a gate oxide layer
Implementation Method 3
a first doped column region of the first conductivity type with column shape within each the mesa; a pair of second doped column regions of a second conductivity type with column shape adjacent to sidewalls of the pair of deep trenches
Data Source
AI summary
A super-junction trench MOSFET is disclosed by applying a first doped column region of first conductivity type between a pair of second doped column regions of second conductivity type adjacent to sidewalls of a pair of deep trenches with buried voids in each unit cell for super-junction. A buffer poly-silicon layer is deposited above the buried void for stress release to prevent wafer crack and silicon defects.