Superjunction Trench Implantation with Protective Layer for Dopant Retention
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Solution Overview
Problem
Superjunction devices face challenges in maintaining uniform doping concentrations across different sections of the semiconductor body due to outgassing effects during high-temperature processing, leading to variations in voltage blocking capability and on-resistance.
Innovation Solution
A method involving the formation of semiconductor arrangements with trenches and selective implantation of dopant atoms into sidewalls, followed by the use of a protective layer to prevent dopant atoms from escaping, ensuring precise control over doping concentrations and minimizing outgassing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If high-temperature processing is used during manufacturing, then semiconductor layers can be formed and processed, but dopant atoms escape from the drift region through outgassing
Solution Approach 1:
A protective layer is formed covering the drift region before high-temperature processing steps. This preliminary protective measure prevents dopant atoms from escaping during subsequent high-temperature manufacturing steps, allowing proper doping concentration to be maintained without loss.
Solution Approach 2:
The protective layer acts as an intermediary barrier between the dopant atoms in the drift region and the external environment during high-temperature processing. This intermediate layer blocks the outgassing pathway while allowing the necessary thermal processing to occur.
2Reliability
If dopant atoms are implanted into drift region, then voltage blocking capability is enhanced, but doping concentration varies across different sections
Solution Approach 1:
The protective layer is selectively formed to cover only the drift region where dopant atoms are implanted, while leaving other regions exposed. This local application ensures precise control of doping concentration in the drift region without affecting other areas, maintaining uniformity where needed.
Solution Approach 2:
The protective layer prevents outgassing of dopant atoms during processing, providing real-time protection that maintains the intended doping concentration profile. This feedback mechanism ensures that the doping process achieves the target concentration uniformity across different sections of the drift region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for exact control of dopant atoms, reducing variations in doping concentrations and enhancing the voltage blocking capability and specific on-resistance of superjunction devices.
Implementation Method 1
forming a protective layer covering mesa regions between the plurality of trenches of the respective semiconductor layer, and covering the bottoms, the first sidewalls and the second sidewalls of each of the plurality of trenches that are formed in the respective semiconductor layer
Implementation Method 2
implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches
Data Source
AI summary
Disclosed is a method for producing a semiconductor device, the method including forming a plurality of semiconductor arrangements one above the other, wherein forming each of the plurality of semiconductor arrangements includes forming a semiconductor layer, forming a plurality of trenches in a first surface of the semiconductor layer, and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches. Forming of at least one of the plurality of semiconductor arrangements further includes forming a protective layer covering mesa regions between the plurality of trenches of the respective semiconductor layer, and covering a bottom, the first sidewall and the second sidewall of each of the plurality of trenches that are formed in the respective semiconductor layer.