Superlattice Annealing for Buried Insulating Semiconductor Layers

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Solution Overview

Problem

Existing semiconductor devices lack enhanced insulating regions or layers, which are crucial for advanced processing techniques and device performance.

Innovation Solution

A method for forming a superlattice on a semiconductor substrate, comprising stacked groups of layers with base semiconductor monolayers and oxygen monolayers constrained within the crystal lattice, followed by epitaxial formation of a semiconductor layer and annealing to create a buried insulating layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a superlattice structure with oxygen monolayers is formed and annealed to create a buried insulating layer, then charge carrier mobility is improved and scattering effects are reduced, but device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The semiconductor structure is segmented into multiple ultra-thin monolayer components (base semiconductor monolayers and oxygen monolayers) stacked to form a superlattice. This segmentation enables the creation of a buried insulating layer through selective annealing of specific oxygen-containing layers, improving charge carrier mobility by isolating conduction channels while maintaining a relatively simple overall fabrication process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes during annealing treatment to transform the oxygen monolayers within the superlattice into a buried insulating layer. By controlling annealing temperature and atmosphere parameters, the oxygen layers reorganize to form insulating regions that enhance charge carrier mobility without requiring complex additional processing steps.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If oxygen monolayers are inserted between semiconductor layers to form a superlattice, then a buried insulating layer is formed that reduces scattering effects, but manufacturing precision requirements increase

Engineering Contradiction:
Improvescattering effectsVSAvoidmanufacturing precision
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

Oxygen monolayers are inserted as intermediary layers between base semiconductor monolayers to form the superlattice structure. These oxygen layers serve as precursors that, upon annealing, transform into the buried insulating layer. This intermediary approach allows for precise control of insulating layer formation while maintaining manageable manufacturing precision requirements through standard epitaxial growth techniques.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The oxygen monolayers are preliminarily inserted during the epitaxial growth phase before the annealing process. This preliminary action positions the oxygen atoms in specific locations within the superlattice, and subsequent annealing automatically transforms them into the desired buried insulating layer configuration, reducing the need for high-precision post-processing steps.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach results in a semiconductor device with improved charge carrier mobility due to reduced effective mass, and provides a buried insulating layer that enhances device performance and reduces unwanted scattering effects.

Implementation Method 1

annealing the superlattice so that oxygen atoms of the at least one oxygen monolayer relocate to form a buried insulating layer... wherein annealing comprises annealing the superlattice at a temperature in a range of 800°C to 1000°C

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentEP3662516B1Method of making a semiconductor device with a buried insulating layer formed by annealing a superlattice
Publication Date: 2025.03.12 ATOMERA INC
  • EP3662516B1 patent drawingFigure 1
  • EP3662516B1 patent drawingFigure 2
  • EP3662516B1 patent drawingFigure 3

AI summary

A method for making a semiconductor device may include forming a superlattice on a semiconductor substrate including a respective plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Further, at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include epitaxially forming a semiconductor layer on the superlattice, and annealing the superlattice to form a buried insulating layer in which the at least some semiconductor atoms are no longer chemically bound together through the at least one non-semiconductor monolayer therebetween.