Superlattice Contact Structure for Dopant Confinement in Trenches
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices face limitations in enhancing charge carrier mobility and reducing alloy scattering, with existing techniques not fully addressing the need for advanced contact structures that constrain dopants effectively.
Innovation Solution
The use of a superlattice liner with stacked groups of semiconductor and non-semiconductor monolayers in semiconductor devices, which constrains contact dopants and improves charge carrier mobility by reducing effective mass, and acts as a barrier to diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional contact structures are used, then manufacturing is simpler, but charge carrier mobility is limited and alloy scattering is not reduced
Solution Approach 1:
The contact structure is segmented into multiple functional layers: a superlattice liner comprising alternating semiconductor and non-semiconductor monolayers, a semiconductor cap layer, and a conductive body. The superlattice itself is segmented into repeated units of semiconductor and non-semiconductor monolayers, creating distinct functional zones for dopant confinement and scattering reduction.
Solution Approach 2:
The superlattice liner is constructed as a composite material system combining semiconductor monolayers (e.g., silicon) with non-semiconductor monolayers (e.g., oxygen, carbon, nitrogen). This composite structure creates unique properties that neither material possesses alone, specifically the ability to confine dopants while reducing alloy scattering and enhancing charge carrier mobility.
2Reliability
If dopants are allowed to diffuse freely, then contact region formation is simpler, but dopant confinement and mobility enhancement are reduced
Solution Approach 1:
The superlattice liner is formed in advance within the trench structure before dopant introduction. This preliminary formation creates pre-configured barrier and confinement regions that guide subsequent dopant placement and prevent unwanted diffusion, simplifying the overall manufacturing process despite the complex structure.
Solution Approach 2:
The superlattice liner acts as an intermediary structure between the trench walls and the dopant atoms. It provides a controlled interface that mediates dopant confinement, allowing precise spatial control of dopant distribution while maintaining manufacturability through standardized deposition processes.
3Reliability
If alloy scattering is not reduced, then material composition is simpler, but charge carrier mobility remains limited
Solution Approach 1:
The superlattice structure introduces local quality variations at the monolayer scale, creating alternating regions of semiconductor and non-semiconductor materials. This local structural differentiation reduces alloy scattering in the semiconductor regions while maintaining overall structural coherence, enhancing charge carrier mobility without requiring complex bulk material composition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances charge carrier mobility and reduces scattering effects, leading to improved device performance and the potential for higher mobility in semiconductor devices, while also providing a method for forming high-K dielectrics and reducing unwanted diffusion.
Implementation Method 1
The superlattice liner includes a plurality of stacked groups of layers... acts as a barrier to diffusion
Implementation Method 2
improves charge carrier mobility by reducing effective mass
Implementation Method 3
reduces scattering effects
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A semiconductor device (30) may include a semiconductor substrate (31) having a trench (32) therein, and a superlattice liner (25) at least partially covering bottom and sidewall portions of the trench. The superlattice liner may include stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device further includes a semiconductor cap layer (33) on the superlattice liner and having a dopant (34) constrained therein by the superlattice liner, and a conductive body (36, 37) within the trench.