Superlattice Source/Drain Structure for Strain and Leakage Control
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Solution Overview
Problem
Conventional epitaxial features in source/drain regions of multi-gate transistors, such as FinFETs and GAA transistors, fail to adequately strain channels while suppressing substrate current leakage, leading to deteriorated DC performance in p-type FETs due to loss of compressive strain and increased resistance.
Innovation Solution
Incorporation of a superlattice structure in the source/drain regions, comprising alternating semiconductor and non-conductive layers, which maintains crystalline structure and isolates source/drain features from the substrate, allowing epitaxial growth while suppressing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional epitaxial features are used in source/drain regions, then the device structure is simple and easy to manufacture, but the channel strain is insufficient and substrate leakage current increases
Solution Approach 1:
The source/drain region is segmented into multiple functional layers: conventional epitaxial features for strain, superlattice layers for leakage suppression, and non-conductive layers for isolation. This segmentation allows each layer to perform its specific function optimally without interfering with others, resolving the contradiction between maintaining simple manufacturing and achieving improved reliability.
Solution Approach 2:
The patent employs composite material structures including superlattice layers composed of alternating semiconductor and non-semiconductor materials, combined with conventional epitaxial semiconductor layers. This composite approach enables simultaneous achievement of strain maintenance (through epitaxial layers) and leakage suppression (through superlattice with non-conductive layers), while the layered composite structure remains compatible with existing manufacturing processes.
2Object-affected harmful factors
If source/drain features are isolated from substrate to reduce leakage, then substrate leakage current is suppressed, but compressive strain on channel is lost and resistance increases
Solution Approach 1:
The superlattice layers act as an intermediary structure between the source/drain features and the substrate. These layers provide electrical isolation to suppress leakage current while simultaneously maintaining the mechanical coupling necessary to transmit compressive strain to the channel. The intermediary superlattice structure thus resolves the contradiction between isolation for leakage suppression and coupling for strain maintenance.
Solution Approach 2:
The patent applies different material properties at different locations: non-conductive layers are placed specifically at the interface with the substrate to suppress leakage, while semiconductor layers are positioned to maintain strain transmission. This local differentiation of material quality allows simultaneous achievement of leakage suppression and strain maintenance without compromising overall device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The superlattice structure enhances DC performance by maintaining strain on the channel while reducing substrate leakage, improving the overall performance of multi-gate transistors.
Implementation Method 1
epitaxially growing a source/drain feature from the superlattice and the sidewalls of the channel layers
Data Source
AI summary
The present disclosure provides a semiconductor device and a method of forming the same. A method according one embodiment of the present disclosure includes forming a first stack over a substrate and a second stack over the first stack. The first stack includes semiconductor layers interleaved by dielectric layers. The second stack includes channel layers interleaved by sacrificial layers. The method also includes patterning the second stack to form a fin-shape structure, recessing a portion of the fin-shape structure to form a recess exposing a top surface of the first stack, epitaxially growing an epitaxial feature directly from the top surface of the first stack, removing the sacrificial layers to release the channel layers, and forming a gate structure wrapping around each of the channel layers.