Superlattice Source/Drain Structure for Strained GAA Channels
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Solution Overview
Problem
Conventional epitaxial features in source/drain regions of multi-gate transistors, such as FinFETs and GAA transistors, fail to adequately strain channels while minimizing substrate current leakage, leading to deteriorated DC performance in p-type FETs due to the loss of compressive strain when the epitaxial growth is isolated from the substrate by a dielectric film.
Innovation Solution
Incorporating a superlattice structure in the source/drain regions with alternating semiconductor and non-conductive monolayers before epitaxial growth, which maintains crystalline continuity and isolates the source/drain features from the substrate, thereby suppressing leakage current and enhancing DC performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a dielectric film is inserted under source/drain features to isolate them from the substrate, then substrate current leakage is suppressed, but compressive strain on the channel is lost leading to deteriorated DC performance
Solution Approach 1:
A superlattice structure comprising alternating semiconductor layers and non-conductive monolayers is introduced as an intermediary between the source/drain features and the substrate. This superlattice provides both electrical isolation to suppress substrate leakage current and maintains compressive strain on the channel through the semiconductor layers, thereby resolving the contradiction between leakage suppression and DC performance maintenance
Solution Approach 2:
The superlattice structure combines semiconductor materials and non-conductive monolayers into a composite structure. The semiconductor layers maintain crystalline continuity and provide strain, while the non-conductive monolayers provide electrical isolation. This composite approach allows simultaneous achievement of leakage suppression and DC performance enhancement
2Ease of manufacture
If conventional epitaxial features are used in source/drain regions, then manufacturing is simplified, but adequate strain on channels cannot be maintained while minimizing substrate leakage
Solution Approach 1:
The superlattice structure segments the epitaxial growth into alternating layers of semiconductor material and non-conductive monolayers. Each layer performs a specific function: semiconductor layers provide strain and crystalline continuity, while non-conductive monolayers provide electrical isolation. This segmentation allows the epitaxial process to achieve multiple objectives simultaneously
Solution Approach 2:
The invention changes the structural parameters of the epitaxial features by introducing a periodic superlattice structure with specific layer thicknesses and compositions. The semiconductor layers are engineered to provide optimal compressive strain while the non-conductive monolayers are positioned and sized to provide sufficient electrical isolation, thereby improving channel strain and leakage control through parameter optimization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The superlattice structure preserves the crystalline structure, allowing epitaxial growth from both substrate and sidewalls, reducing substrate leakage and improving DC performance while maintaining effective strain on the channel region.
Implementation Method 1
the superlattice structure preserves the crystalline structure, allowing epitaxial growth from both substrate and sidewalls
Data Source
AI summary
The present disclosure provides a semiconductor device and a method of forming the same. A method according one embodiment of the present disclosure includes forming a first stack over a substrate and a second stack over the first stack. The first stack includes semiconductor layers interleaved by dielectric layers. The second stack includes channel layers interleaved by sacrificial layers. The method also includes patterning the second stack to form a fin-shape structure, recessing a portion of the fin-shape structure to form a recess exposing a top surface of the first stack, epitaxially growing an epitaxial feature directly from the top surface of the first stack, removing the sacrificial layers to release the channel layers, and forming a gate structure wrapping around each of the channel layers.