Superposer Substrate Passive Component Integration
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Solution Overview
Problem
The integration of high Q passive components, such as inductors and transformers, into semiconductor chips is challenging due to the difficulty and expense of producing them on silicon substrates, and their performance degrades with decreasing substrate resistivity, necessitating external connections which complicate packaging and increase costs.
Innovation Solution
A superposer substrate with high performance passive components is placed on or near the backside of a die, electrically connected using TSVs, TBVs, TMVs, or wire leads, allowing for the use of materials like glass or ceramic that provide superior electrical performance and reduce chip area requirements, enabling the placement of passive components close to the chip for improved RF and power delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive components are made separately from the chip and connected through external connection, then high Q performance is achieved, but packaging complexity and cost increase
Solution Approach 1:
The patent combines the passive components (inductors, capacitors, transformers) with the active chip into a single integrated package structure. The passive components are mounted on the package substrate in close proximity to the chip, and electrical connections are made through conductive structures within the package, merging previously separate components into a unified assembly that improves RF performance while simplifying packaging.
Solution Approach 2:
The package substrate serves as an intermediary platform that hosts both the active chip and passive components. It provides the physical mounting structure and electrical interconnection medium, enabling close coupling between components while maintaining separate fabrication processes. This intermediary approach allows high Q passive components to be integrated without requiring direct fabrication on the chip substrate.
2Device complexity
If passive components are integrated on silicon substrate, then packaging is simplified, but manufacturing difficulty and cost increase
Solution Approach 1:
The patent segments the fabrication process into two independent parts: active components fabricated on the chip substrate and passive components fabricated separately on the package substrate. This segmentation allows each type of component to be manufactured using optimized processes for its specific requirements, avoiding the manufacturing difficulties of integrating high Q passives directly on silicon while still achieving integration benefits.
Solution Approach 2:
The package substrate provides a specialized local environment optimized for passive component fabrication, with appropriate substrate materials, conductor patterns, and component mounting structures. This local quality optimization allows passive components to be manufactured with high performance characteristics using processes tailored to their specific needs, rather than forcing them into the active chip fabrication process.
3Ease of manufacture
If passive components are placed far from the chip, then manufacturing is easier, but RF performance degrades due to IR drops and insertion loss
Solution Approach 1:
The patent transitions from planar separation to three-dimensional integration by mounting passive components on the package substrate in close proximity to the chip and using vertical conductive structures for connections. This dimensional approach allows components to be physically close for optimal RF performance while maintaining separate fabrication processes, overcoming the limitations of traditional planar layouts.
Data Source
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AI summary
A die package is described that includes a substrate to carry passive components. In one example, the package has a semiconductor die having active circuitry near a front side of the die and having a back side opposite the front side, and a component substrate near the back side of the die. A plurality of passive electrical components are on the component substrate and a conductive path connects a passive component to the active circuitry. The die has a silicon substrate between the front side and the back side and the conductive path is a through-silicon via through the die from the back side to the active circuit.