Supervia Interconnect Structure for Lower Electromigration Routing

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Solution Overview

Problem

As semiconductor devices shrink in size, interconnect structures face challenges with one-dimensional routing, leading to increased complexity and electro-migration issues, which affect the reliability and manufacturing efficiency of integrated circuits.

Innovation Solution

The implementation of supervias, which connect conductive lines across multiple metal layers, reducing the number of turns signals take and omitting intermediate conductive lines, thereby decreasing complexity and mitigating electro-migration effects by providing a more direct path for current flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If one-dimensional routing is used in interconnect structures, then manufacturing is simplified, but device complexity increases and electro-migration issues worsen

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidrouting complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent introduces supervias that extend in the vertical dimension to connect conductive lines across multiple metal layers. This dimensional transition allows signals to bypass intermediate layers without adding horizontal routing complexity, effectively moving from constrained two-dimensional routing to three-dimensional interconnect architecture, thereby reducing overall routing complexity while maintaining manufacturing feasibility

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If intermediate conductive lines are included to connect metal layers, then electrical connection is ensured, but device complexity and electro-migration effects increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidinterconnect structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The supervia structure extracts and eliminates the need for intermediate conductive lines between metal layers. By creating a direct vertical conductive path that spans multiple layers, the design removes unnecessary intermediate connection elements, thereby reducing interconnect structure complexity while maintaining reliable electrical connection through the supervia's continuous conductive path

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If signals take multiple turns through intermediate layers, then routing flexibility is achieved, but electro-migration effects worsen and reliability decreases

Engineering Contradiction:
Improverouting flexibilityVSAvoidelectro-migration resistance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The supervia provides a direct vertical pathway in the third dimension, allowing signals to transition between metal layers without making multiple horizontal turns through intermediate layers. This dimensional shortcut reduces the total path length and number of direction changes, thereby improving electro-migration resistance while preserving routing flexibility through the vertical dimension

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240387361A1Integrated circuit including supervia and method of making
Publication Date: 2024.11.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240387361A1 patent drawing
  • US20240387361A1 patent drawing
  • US20240387361A1 patent drawing

AI summary

An integrated circuit includes a first conductive line parallel to a top surface of the substrate; a second conductive line parallel to the top surface of the substrate; a third conductive line parallel to the top surface of the substrate; and a fourth conductive line parallel to the top surface of the substrate. The integrated circuit further includes a first supervia directly connected to the first conductive line and the third conductive line, wherein a first angle between a lower sidewall of a lower portion of the first supervia and the top surface of the substrate is different from a second angle between an upper sidewall of an upper portion of the first supervia and the top surface of the substrate. The integrated circuit further includes a second supervia directly connecting the second conductive line to the fourth conductive line.