Supervisory Circuit for SoC Signal Order Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
It is challenging to supervise whether signal processing operations by multiple circuits and programs in a highly-integrated semiconductor integrated circuit, such as a system on a chip (SoC), are executed in a predetermined order, making it difficult to ensure proper program and circuit processing.
Innovation Solution
A supervisory circuit comprising a trigger determination circuit and a trigger table that receives signal processing signals, determines if processing operations are in the correct order, and outputs an interrupt signal when a trigger signal is out of sequence, using sequence determination information stored in memory to manage and correct the order of signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a highly-integrated semiconductor integrated circuit (SoC) is used to perform signal processing with multiple programs and circuits, then processing capability and integration are improved, but the ability to supervise and verify predetermined execution order deteriorates
Solution Approach 1:
A supervisory circuit is introduced as an intermediary component between the signal processing circuits and the external environment. This supervisory circuit receives trigger signals from multiple signal processing circuits, determines whether they occur in the predetermined order using stored sequence information, and generates error signals when deviations are detected. This mediator enables reliable supervision of execution order without compromising the high integration and processing capability of the SoC.
2Adaptability or versatility
If multiple signal processing circuits and programs are integrated in a predetermined order supervision system, then processing versatility is improved, but the complexity of determining execution order deteriorates
Solution Approach 1:
The supervisory circuit stores the predetermined correct execution order of trigger signals in advance in its internal memory before operation begins. This preliminary preparation of reference sequence information enables the supervisory circuit to quickly and simply compare incoming trigger signals against the pre-stored correct order, thereby managing the complexity of multi-circuit supervision without increasing operational complexity.
Data Source
AI summary
According to one embodiment, a supervisory circuit includes a trigger determination circuit and a trigger table. The trigger determination circuit receives signal processing signals outputted from a plurality of signal processing circuits as trigger signals, determines whether processing operations by the signal processing circuits are executed in a predetermined order, and outputs an interrupt signal when detecting a trigger signal out of setting. The trigger table is provided with trigger-specific tables corresponding to the respective signal processing circuits, reads a trigger setting to occur next based on a trigger determined as being correct by the trigger determination circuit, and outputs a table read signal to the trigger determination circuit.