Supplemental Cell Refresh Logic for DRAM Power Optimization

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Solution Overview

Problem

Conventional DRAM devices face inefficiencies in refresh operations due to inaccurate temperature sensing, leading to excessive power consumption and reduced bandwidth, as they employ a single temperature sensor that may not accurately represent the temperature across the memory array, resulting in overly conservative refresh policies.

Innovation Solution

The implementation of supplemental cells that sample at lower frequencies than data cells to observe decay characteristics, allowing for the generation of a localized refresh policy based on observation data, thereby optimizing refresh rates and reducing power consumption and bandwidth usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single temperature sensor is used to determine refresh policy for the entire memory array, then the refresh policy can be simplified and implemented uniformly, but the temperature measurement accuracy deteriorates and leads to overly conservative refresh rates

Engineering Contradiction:
Improverefresh policy implementationVSAvoidtemperature measurement accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The memory array is divided into multiple temperature zones, each with its own temperature sensor and refresh policy. This segmentation allows localized temperature monitoring and refresh control, improving measurement precision without significantly increasing overall system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different refresh policies are applied to different regions of the memory array based on local temperature conditions. Each region's refresh rate is optimized according to its specific temperature characteristics rather than using a uniform conservative policy across the entire array.

Inventive Principle:
Principle #3Local quality

2Reliability

If refresh operations are performed at high frequency to ensure data retention under worst-case temperature conditions, then data reliability is improved, but power consumption increases and available bandwidth decreases

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The refresh policy is made dynamic and adaptive, with refresh rates adjusted in real-time based on actual temperature sensor readings from different memory array regions. This allows the system to maintain data reliability while avoiding excessive refresh operations when temperatures are lower.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Temperature sensors continuously monitor memory array temperature and provide feedback to the refresh control logic. This feedback mechanism enables the system to adjust refresh rates according to actual thermal conditions, ensuring data retention while optimizing power consumption.

Inventive Principle:
Principle #23Feedback

3Reliability

If refresh operations are performed at high frequency to maintain data integrity, then the probability of error is reduced, but the available system bandwidth decreases due to memory array unavailability during refresh periods

Engineering Contradiction:
Improvedata integrityVSAvoidsystem bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory array is segmented into multiple regions that can be refreshed independently or in different sequences. This allows for more efficient refresh scheduling that minimizes the impact on overall system bandwidth while maintaining data integrity across all regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Refresh operations are performed periodically based on actual temperature conditions rather than at fixed high frequency. The periodic refresh intervals are dynamically adjusted according to temperature sensor feedback, maintaining data integrity while maximizing available bandwidth for normal memory operations.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9159396B2Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
Publication Date: 2015.10.13 LATTICE SEMICON CORP
  • US9159396B2 patent drawing
  • US9159396B2 patent drawing
  • US9159396B2 patent drawing

AI summary

A mechanism for facilitating improved refresh schemes for memory devices is described. In one embodiment, an apparatus includes a memory device having refresh logic and memory cells, the memory cells including data cells and supplemental cells, the supplemental cells to be observed. The supplemental cells emulate a decay characteristic of the data cells performing regular refresh operations according to an existing refresh policy. The apparatus may further include the refresh logic to receive, from the supplemental cells, observation data relating to decaying of the supplemental cells, and correlate the observation data to data cell performance. The refresh logic to generate a policy recommendation based on the observation data collected by the supplemental cells.