Supply Modulator Calibration for Transmitter Stability

The patent implements dynamic adjustment of the GBW product by making the compensation capacitor value variable rather than fixed. The compensation capacitor is divided into multiple sub-capacitors that can be selectively connected or disconnected based on operating conditions (PVT variations, load resistance changes), allowing the amplifying stage to maintain optimal stability margins across different operating points without requiring a completely redesign of the circuit architecture.

The patent changes the parameter of the compensation capacitor from a fixed value to a variable value that can be adjusted according to operating conditions. By varying the capacitance value through selective connection of sub-capacitors, the system adapts to PVT variations and load resistance changes, maintaining stable operation and linearity without increasing the fundamental circuit complexity.

The patent segments the compensation capacitor into multiple sub-capacitors (e.g., C1, C2, C3) that can be independently controlled. This segmentation allows selective connection of appropriate capacitance values based on the operating conditions - smaller capacitance values for high-power operations to maintain frequency response, and larger values for low-power operations to optimize stability. The same segmentation principle applies to the push-pull output stage transistors.

The patent dynamically adjusts the transistor level and compensation capacitance based on the input signal level and operating conditions. During calibration, the system determines optimal transistor levels and capacitance combinations for different power ranges, allowing the circuit to switch between configurations to simultaneously achieve high power handling capability and good frequency characteristics without being constrained by a fixed design.

The patent performs calibration in advance during the manufacturing process or initial system setup. The calibration procedure measures the actual characteristics of the amplifying stage under various conditions and pre-determines the optimal capacitance combinations and transistor levels for different power ranges. These calibration results are stored in a lookup table or configuration memory, allowing the system to quickly switch between pre-optimized settings during operation without requiring time-consuming real-time calibration.

The patent implements calibration at periodic intervals or at specific trigger events (e.g., power-on, mode switching) rather than continuously. The calibration process is executed when the system enters a calibration mode, and the results are stored for subsequent operations. This periodic calibration approach balances the need for adaptability with the constraint of calibration time, ensuring the system remains accurate without requiring constant calibration overhead.