Supply-Referenced Oscillator Loop for Stable Clock Frequency
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Solution Overview
Problem
Conventional oscillator arrangements in semiconductor devices are not cost-effective for smaller systems due to the need for external reference crystal clocks and are sensitive to temperature and supply voltage variations, leading to frequency instability and high power consumption.
Innovation Solution
An oscillator arrangement comprising a current-controlled oscillator, a frequency-to-voltage converter, and an operational amplifier, where both feedback and reference voltages are generated from the same supply voltage, eliminating the need for additional amplifiers and reducing power consumption, and using a switched capacitor resistor arrangement for frequency trimming to maintain stability across temperature and process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a reference oscillator in a negative feedback loop is used to mimic PLL performance, then cost is reduced by eliminating external reference crystal, but frequency stability deteriorates due to sensitivity to temperature and supply voltage variations
Solution Approach 1:
The patent uses a switched capacitor resistor arrangement where digital trimming bits control switches to select different capacitor values, thereby changing the RC time constant parameter to trim the oscillator frequency. This allows frequency adjustment without requiring external components or complex DAC circuits.
Solution Approach 2:
The invention extracts and eliminates the need for external reference crystal clocks and complex digital-to-analog converter circuits by implementing direct digital control of the RC timing network through switched capacitors, simplifying the overall system while maintaining frequency stability.
2Ease of operation
If a conventional DAC implementation scheme is used to convert trimming bits to analog voltage for frequency programming, then frequency control is achieved, but area consumption increases to 70-80% of oscillator area
Solution Approach 1:
The patent removes the bulky digital-to-analog converter circuitry from the oscillator design by implementing direct digital control of the frequency-determining RC network. Digital trimming bits directly control switches that select capacitor values, eliminating the need for intermediate analog voltage conversion and significantly reducing area.
Solution Approach 2:
The invention replaces the conventional analog voltage-based frequency control mechanism with a direct digital control mechanism. Instead of converting digital bits to analog voltage through DAC, the patent uses digital signals to directly control switches in the RC timing network, substituting analog conversion with digital switching.
3Manufacturing precision
If a negative feedback loop is used to linearize the VCO, then linearity is improved, but additional components and complexity are introduced
Solution Approach 1:
Instead of using negative feedback to force linearity, the patent inverts the approach by directly controlling the frequency-determining RC network with digitally switched capacitors. This direct control method achieves linear frequency control without requiring feedback loops or additional linearizing components.
Data Source
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AI summary
There is provided an oscillator arrangement for generating a clock signal. The oscillator arrangement comprises a current controlled oscillator, a frequency to voltage converter, and an operational amplifier. The oscillator arrangement is connectable to a supply voltage source. The current controlled oscillator is adapted to generate a clock signal based on a control voltage signal, wherein the generated clock signal is supplied to the frequency to voltage converter. The frequency to voltage converter is adapted to generate an output voltage signal based on the generated clock signal and based on the supply voltage signal. The operational amplifier is adapted to receive the output voltage signal as a feedback signal at a first input terminal and to receive a reference voltage signal at a second input terminal, the reference voltage signal being generated from the supply voltage signal. The current controlled oscillator is adapted to be controlled based on an output signal of the operational amplifier, wherein the output signal of the operational amplifier provides the control voltage signal to the current controlled oscillator in order to control the frequency of the clock signal.