Supply Voltage Ringing Detection With Dynamic Clock Adjustment
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Solution Overview
Problem
Computing devices, especially mobile devices, face issues with supply voltage undershoot and ringing due to high current loads, leading to potential equipment damage and computing errors, which existing technologies fail to adequately address.
Innovation Solution
The implementation of sensor circuitry and control circuitry that detect supply voltage events, such as load steps or releases, and perform corrective actions like adjusting clock cycle time or frequency to mitigate voltage transients, using a combination of sensors like high-pass filters, low-pass filters, and voltage-controlled oscillators to manage supply voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high current loads are used to improve processing power, then productivity is improved, but supply voltage undershoot and ringing occur causing reliability to deteriorate
Solution Approach 1:
The sensor circuitry continuously monitors supply voltage and detects load step events before they cause critical undershoot. By detecting the initial voltage drop and predicting subsequent ringing, the system can preemptively adjust clock frequency or activate corrective actions before the worst-case voltage condition occurs, thus maintaining reliability during high current loads
Solution Approach 2:
The system implements a feedback mechanism where sensor circuitry monitors supply voltage in real-time, detects undershoot events, and triggers control circuitry to adjust operating parameters. This closed-loop feedback allows the system to dynamically respond to voltage fluctuations caused by high current demands, maintaining stable operation during high productivity scenarios
2Use of energy by moving object
If voltage margins are reduced to improve power efficiency, then use of energy is improved, but susceptibility to voltage transients increases causing reliability to deteriorate
Solution Approach 1:
By detecting load step events and predicting ringing before it occurs, the system can preemptively lower clock frequency or activate mitigation strategies when voltage margins are reduced. This allows the system to operate efficiently with lower voltage margins while still protecting against transients through timely corrective action
Solution Approach 2:
The sensor circuitry and control logic are integrated within the power management system, allowing the system to self-monitor and self-correct voltage transients without external intervention. This enables reduced voltage margins to be used efficiently while maintaining reliability through automated protective measures
3Reliability
If fast response to voltage changes is implemented to improve reliability, then response speed is improved, but device complexity increases due to additional sensors and control circuitry
Solution Approach 1:
The sensor circuitry is designed to detect multiple types of voltage events (load steps, releases, ringing, undershoot) using a single integrated detection mechanism. The control circuitry implements a unified response protocol that handles various voltage conditions through common corrective actions, reducing overall system complexity while maintaining comprehensive protection
Solution Approach 2:
The patent introduces an intermediary detection layer between the power supply and the processing elements. This intermediary sensor circuitry translates complex voltage waveforms into simplified detection signals that trigger predefined corrective actions, acting as a mediator that simplifies the control logic while enabling fast response to voltage events
4Speed
If clock frequency is increased to improve processing speed, then speed is improved, but susceptibility to timing failures during voltage droop increases causing reliability to deteriorate
Solution Approach 1:
The sensor circuitry detects load step events and predicts subsequent voltage ringing before they occur. When such events are detected, the control circuitry preemptively adjusts clock frequency to avoid timing failures during the anticipated voltage droop, allowing the system to maintain higher average speeds while protecting against timing errors during transient conditions
Solution Approach 2:
The system implements dynamic clock frequency adjustment based on real-time voltage conditions. Rather than operating at a fixed high frequency, the clock speed is dynamically adapted to match supply voltage levels, allowing maximum processing speed during stable conditions while automatically reducing frequency during voltage droop to prevent timing failures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces supply voltage transients, avoids equipment damage, and allows for reduced voltage margins, thereby improving the reliability and power efficiency of computing devices.
Implementation Method 1
a sensor includes a replica of voltage-controlled oscillator (VCO) delay stages (e.g., where the VCO has a separate power supply and the replica is powered by the supply voltage being measured) and is configured to measure phase differences between the VCO and the replica to detect changes in the supply voltage
Implementation Method 2
a programmable sensor complex includes one or more high-pass filters, one or more low-pass filters, and one or more programmable level-sense elements
Data Source
AI summary
Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).