Supply-Tracking Hysteresis Buffer for PVT-Stable Oscillator Inputs
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Solution Overview
Problem
High-voltage designs in crystal oscillator circuits face challenges due to PVT variations, leading to increased startup time and phase noise, and conventional Schmitt triggers complicate meeting input threshold hysteresis buffer requirements.
Innovation Solution
Incorporation of supply tracking bias units and compensation components into the circuit design to stabilize the hysteresis buffer, minimizing variations caused by PVT fluctuations and maintaining reliable performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional Schmitt triggers are used in high-voltage crystal oscillator circuits, then voltage threshold detection is achieved, but PVT variations cause increased startup time and phase noise
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the reference voltage levels in the hysteresis buffer to track and compensate for PVT variations. The bias circuit modifies the voltage thresholds based on detected process, voltage, and temperature changes, ensuring the hysteresis buffer maintains reliable operation across varying conditions while reducing startup time and phase noise
2Use of energy by moving object
If high-voltage devices are used in crystal oscillator circuits, then voltage headroom is improved, but design complexity increases due to PVT variation compensation requirements
Solution Approach 1:
The patent implements feedback through a bias circuit that continuously monitors PVT conditions and adjusts the hysteresis buffer reference voltages accordingly. This closed-loop approach automatically compensates for variations without requiring complex manual calibration or multiple discrete compensation circuits, thereby maintaining voltage headroom while managing design complexity through intelligent feedback control
3Use of energy by moving object
If high-voltage devices are used in crystal oscillator circuits, then voltage headroom is improved, but phase noise increases due to PVT variations
Solution Approach 1:
The patent reduces phase noise by dynamically changing the reference voltage parameters in the hysteresis buffer to track PVT variations. The bias circuit adjusts these parameters in real-time, ensuring stable oscillation conditions and minimizing phase noise while preserving the voltage headroom benefits of high-voltage operation
Data Source
AI summary
Circuits and methods are provided for an input hysteresis buffer that includes a voltage limiting unit, a voltage detecting unit connected to the voltage limiting unit, and a supply tracking bias unit connected to the voltage detecting unit. The voltage liming unit comprises a first voltage limiting unit and a second voltage limiting unit. The voltage detecting unit comprises a first voltage detecting unit configured to detect the presence of a first threshold voltage in an input signal, and a second voltage detecting unit configured to detect the presence of a second threshold voltage in the input signal. The supply tracking bias unit is configured to supply a control signal to the voltage detecting unit.


