Supply Voltage Control for Leakage Current Reduction
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Solution Overview
Problem
Existing power-management schemes for electronic devices face inefficiencies due to the need to frequently save and restore logic states during idle periods, which consumes time, processing power, and energy, making them less effective in scenarios with frequent and short-lived idle conditions.
Innovation Solution
Implementing a data-state preserving power-management scheme where the supply voltage to idle components is reduced to a lower value rather than being completely disconnected, eliminating the need to save and restore logic states, and using selective transistor switches to control voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the supply voltage to idle components is completely disconnected to reduce leakage current, then power consumption is reduced, but the logic state must be saved and restored which consumes time and processing power
Solution Approach 1:
The patent changes the supply voltage parameter from binary (fully on/off) to a three-state system (operational voltage, reduced voltage, and off). By adjusting the voltage parameter to an intermediate reduced level, the system maintains component functionality and logic state integrity while significantly reducing leakage current, thereby eliminating the need for state save/restore operations during idle periods.
2Loss of energy
If the supply voltage is completely disconnected during idle periods, then power savings are maximized, but device complexity increases due to state management requirements
Solution Approach 1:
The patent simplifies device complexity by changing the voltage control parameter to include a reduced voltage state. This eliminates the need for complex state management logic (save/restore operations) while maintaining power savings, as the component remains functional at reduced voltage without requiring external state management intervention.
3Loss of energy
If frequent save and restore operations are performed, then complete power disconnection becomes feasible, but overall performance suffers and power savings are eroded
Solution Approach 1:
The patent resolves the performance-power savings tradeoff by introducing a reduced voltage parameter state. This allows the system to maintain continuous operation at reduced voltage during idle periods, achieving significant power savings without the performance degradation caused by frequent save/restore operations, thus eliminating the need to choose between the two extremes.
Data Source
AI summary
One embodiment provides a method for reducing leakage current in device logic having an operational supply-voltage threshold, a nonzero data-retention supply voltage threshold, and two or more on-die transistor switches to switchably connect a voltage source to the device logic. After the logic enters an idle period, one or more of the switches are opened to lower a supply voltage of the logic below the operational supply-voltage threshold but above the data-retention supply-voltage threshold. When the logic exits the idle period, one or more of the switches are closed to raise the supply voltage of the logic above the operational supply-voltage threshold.