Support Pillar Structure for Stress-Aligned Vertical Memory Stacks

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Solution Overview

Problem

The increasing memory density in vertical memory arrays leads to issues such as tier shrinkage, over etching or under etching, contact misalignment, and electrical shorting due to the tensile stress of support pillar structures made of tungsten, which are used to support the stack structure during processing.

Innovation Solution

Incorporating first support pillar structures made of a different material composition that does not exhibit tensile stress, such as dielectric materials, and second support pillar structures that are electrically conductive and connected through bridge structures, while the first support pillar structures are isolated from the source structure, thereby reducing stress-induced structural asymmetries and misalignments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If support pillar structures are made of tungsten to provide mechanical support during processing, then structural support strength is improved, but tensile stress causes stack structure bending and misalignment

Engineering Contradiction:
Improvesupport strengthVSAvoidalignment precision
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent changes the material parameter of support pillars from tungsten (high tensile stress) to materials with lower or negligible tensile stress, such as polysilicon or doped semiconductor materials. This parameter change maintains structural support capability while eliminating the harmful tensile stress that causes stack bending and misalignment during processing

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts the previously harmful tensile stress effect into a beneficial outcome by selecting materials that naturally have low or zero tensile stress. This eliminates the need for additional stress compensation measures and directly achieves precise alignment throughout the manufacturing process

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Quantity of substance

If the number of tiers in vertical memory array is increased to improve memory density, then memory capacity is improved, but stress-induced asymmetries and electrical shorting increase

Engineering Contradiction:
Improvememory densityVSAvoidelectrical connection reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the material composition parameter of support pillars to reduce tensile stress, enabling the fabrication of higher-tier stack structures without the reliability issues of electrical shorting and asymmetries that plague conventional tungsten-based support structures

Inventive Principle:
Principle #35Parameter changes

3Strength

If support pillar structures are made with higher tensile stress materials to maintain structural integrity, then mechanical support is improved, but tier shrinkage and over etching occur

Engineering Contradiction:
Improvestructural integrityVSAvoiddimensional control
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent changes the material parameter from high tensile stress materials to low or zero tensile stress materials, maintaining structural integrity during processing while preventing tier shrinkage and over etching that compromise dimensional control

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250344381A1Microelectronic devices including support pillars, and related memory devices
Publication Date: 2025.11.06 LODESTAR LICENSING GROUP LLC
  • US20250344381A1 patent drawing
  • US20250344381A1 patent drawing
  • US20250344381A1 patent drawing

AI summary

A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.