Support Substrate CTE Mismatch Warpage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor packaging, the flip-chip bonding method often results in warpage of the molding layer due to coefficient of thermal expansion (CTE) mismatches, which can damage semiconductor chips and reduce yield during the manufacturing process.
Innovation Solution
A support substrate is designed with a first plate, an adhesive layer, and a second plate, where the CTE of the adhesive layer is higher than both plates, and the CTE of the polymer layer is higher than the inorganic layers, allowing for stress-induced anti-warpage to counteract potential warpage of the molding layer, thereby maintaining its flatness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the flip-chip bonding method is used to mount semiconductor chips on substrates, then the number of I/O terminals can be increased, but warpage of the molding layer occurs due to CTE mismatches
Solution Approach 1:
The patent changes the CTE parameter of the support substrate by selecting materials with different CTE values. The first support substrate has a CTE lower than the semiconductor chip, while the second support substrate has a CTE higher than the semiconductor chip. This parameter change allows the support substrates to counteract each other's warpage effects, maintaining the flatness of the molding layer while enabling high-density I/O terminal arrangements through flip-chip bonding.
Solution Approach 2:
The patent uses composite material structures for the support substrates, combining multiple materials with different CTE properties. The first support substrate comprises materials with lower CTE (such as ceramic substrates or metal cores), while the second support substrate uses materials with higher CTE (such as plastic substrates). This composite approach creates a balanced system where the CTE mismatches compensate for each other, preventing molding layer warpage while supporting high I/O terminal counts.
2Manufacturing precision
If support substrates with different CTE values are used, then warpage of the molding layer can be prevented, but the device structure becomes more complex
Solution Approach 1:
The patent segments the support substrate system into two distinct parts: a first support substrate with lower CTE and a second support substrate with higher CTE. Each segment serves a specific function in counteracting warpage. This segmentation allows the complex CTE balancing requirement to be divided into two manageable components, each with a defined material composition and thermal expansion characteristic, making the overall system easier to design and manufacture despite the inherent complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The support substrate effectively reduces or prevents warpage of the molding layer, improving the yield of semiconductor packages by ensuring the flatness and integrity of the semiconductor package during the manufacturing process.
Implementation Method 1
a coefficient of thermal expansion (CTE) of the adhesive layer is higher than a CTE of the first plate and higher than a CTE of the second plate
Implementation Method 2
a coefficient of thermal expansion (CTE) of the polymer layer is higher than a CTE of the first inorganic layer and higher than a CTE of the second inorganic layer
Data Source
AI summary
A support substrate, a method of manufacturing a semiconductor package, and a semiconductor package, the support substrate including a first plate; a second plate on the first plate; and an adhesive layer between the first plate and the second plate, wherein a coefficient of thermal expansion (CTE) of the adhesive layer is higher than a CTE of the first plate and higher than a CTE of the second plate.


