Support Substrate Native Oxide Preservation During Poly-Si Deposition
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Solution Overview
Problem
Existing processes for fabricating carrier substrates for semiconductor-on-insulator and piezoelectric-on-insulator structures are lengthy and energy-intensive, involving high-temperature steps that require significant power consumption and chamber unavailability.
Innovation Solution
A process that preserves a native silicon oxide layer during high-temperature deposition by introducing an oxidizing gas, allowing direct formation of a polycrystalline silicon charge-trapping layer without additional silicon oxide deposition, reducing the process duration and energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional high-temperature oxidation process is used to form passivation layer, then charge-trapping layer can be formed, but process duration becomes very long (70-85% time increase) and energy consumption increases significantly
Solution Approach 1:
The native oxide layer present on the silicon substrate before deposition is preserved and utilized as the passivation layer. This preliminary oxide layer is maintained intact during the high-temperature deposition process by controlling the atmosphere, eliminating the need for separate oxidation steps and significantly reducing process time.
Solution Approach 2:
The separate oxidation step traditionally required to form the passivation layer is removed from the process. The native oxide layer is extracted and utilized directly, eliminating redundant processing steps while maintaining the necessary insulating properties.
2Reliability
If traditional high-temperature oxidation process is used to form passivation layer, then charge-trapping layer can be formed, but energy consumption increases due to prolonged high-temperature exposure
Solution Approach 1:
The passivation layer is prepared in advance as a native oxide layer on the substrate. This preliminary formation occurs naturally before deposition, eliminating the need for energy-intensive high-temperature oxidation steps during the manufacturing process.
Solution Approach 2:
The separate oxidation step consuming significant energy is removed from the process sequence. The native oxide is extracted and utilized directly, reducing total energy consumption while maintaining charge-trapping layer formation capability.
3Manufacturing precision
If native oxide layer is removed before deposition, then clean substrate surface is achieved, but additional oxidation step is required increasing process complexity
Solution Approach 1:
The native oxide layer serves dual purposes: it provides the necessary passivation function and acts as the insulating layer between substrate and charge-trapping layer. The substrate surface self-prepares the required structure without needing external removal and reformation steps.
Solution Approach 2:
The passivation layer and substrate interface preparation are merged into a single native oxide layer. This consolidation eliminates separate removal and oxidation steps, reducing process complexity while maintaining manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process significantly shortens the fabrication time by 70-85% and reduces energy consumption, enabling faster reuse of the deposition chamber while maintaining the integrity of the native silicon oxide layer.
Implementation Method 1
introducing an oxidizing gas into the deposition chamber, with a view to preserving the layer of native silicon oxide during the increase in temperature
Implementation Method 2
depositing, in the deposition chamber, the polycrystalline silicon charge-trapping layer on the layer of native silicon oxide
Data Source
AI summary
A method for manufacturing a support substrate comprising a charge-trapping layer for a semiconductor-on-insulator or piezoelectric-on-insulator structure for a radio-frequency application, includes: placing a base substrate comprising a layer of native silicon oxide in a deposition chamber; raising the temperature of the deposition chamber to a deposition temperature of the charge-trapping layer; introducing an oxidizing gas into the deposition chamber in order to preserve the layer of native silicon oxide during the temperature rise; venting the oxygen from the deposition chamber at the formation temperature of the charge-trapping layer; and-depositing, in the deposition chamber, the charge-trapping layer of polycrystalline silicon on the layer of native silicon oxide.


