Suppression Implant Reduces Threading Dislocations
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Solution Overview
Problem
High-energy dopant implants in semiconductor substrates lead to the formation of threading dislocations, causing electrical issues like junction leakage and Gate Oxide Integrity problems, and existing solutions such as adjusting implant doses or using two-step anneals are either impractical or alter the doping profile, necessitating a more effective method to reduce these dislocations within commercial processing constraints.
Innovation Solution
A suppression implant, such as a Fluorine implant, is placed proximate to the doped well within the semiconductor substrate, specifically between the peak concentration of the doped well and active junctions, using energies ranging from 120 KeV to 540 KeV and doses of at least 1.5E14 atoms/cm2, to effectively reduce threading dislocations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-energy dopant implants are used to achieve desired dopant concentration and depth, then electrical characteristics are improved, but threading dislocations are generated causing junction leakage and Gate Oxide Integrity issues
Solution Approach 1:
A suppression implant layer is introduced as an intermediary between the high-energy dopant implant and the substrate. This suppression implant absorbs or mitigates the harmful effects of high-energy implantation, reducing threading dislocation generation while allowing the desired dopant profile to be achieved. The suppression implant acts as a mediator that protects the substrate from the full impact of high-energy ions.
Solution Approach 2:
The patent converts the harmful effect of high-energy implantation (which generates threading dislocations) into a beneficial process by using the same high-energy implantation to create a suppression implant layer that subsequently reduces dislocation density. The initial harmful implantation creates a protective layer that benefits the overall device reliability.
2Object-affected harmful factors
If Boron implant dose is adjusted to avoid maximum defect density range, then threading dislocation density is reduced, but doping profile deviates from intended design
Solution Approach 1:
The implantation process is segmented into two distinct steps: first, a suppression implant is performed to create a protective layer that reduces threading dislocations; second, the intended dopant implant is performed to achieve the desired doping profile. This segmentation allows each implant to be optimized independently, avoiding the need to compromise the doping profile to reduce dislocations.
Solution Approach 2:
The suppression implant serves as an intermediary step that decouples the relationship between implant dose and threading dislocation density. By introducing this intermediate layer, the patent allows the main dopant implant to proceed at the intended dose without directly causing maximum defect density, as the suppression implant has already mitigated the harmful effects.
3Object-affected harmful factors
If two-step anneal process is used to reduce threading dislocations, then dislocation density is reduced, but processing time increases to 20 or so hours
Solution Approach 1:
The patent replaces the thermal-mechanical annealing process (which requires long time periods) with a physical implantation-based suppression mechanism. Instead of using prolonged thermal treatment to reduce dislocations, the suppression implant physically creates a protective layer that reduces threading dislocation density immediately, eliminating the need for extended annealing times.
Solution Approach 2:
The patent changes the approach from thermal parameter control (temperature and time of annealing) to implantation parameter control (energy and dose of suppression implant). By changing from thermal processing to ion implantation, the patent achieves dislocation reduction in a much shorter time frame while maintaining effectiveness.
4Reliability
If suppression implant is placed proximate to doped well to reduce threading dislocations, then electrical issues are minimized, but additional processing step is added
Solution Approach 1:
The suppression implant step is merged with the existing dopant implantation process flow. By positioning the suppression implant proximate to the doped well and performing it in close sequence with the main dopant implant, the patent combines two functional implants into a coordinated process, minimizing the addition of separate processing steps while achieving both suppression and doping objectives.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces threading dislocations, minimizing leakage paths and electrical issues, while being compatible with commercial semiconductor fabrication processes, and positioning the suppression implant within 0.5 microns of the peak concentration provides superior results.
Implementation Method 1
forming a suppression implant within the substrate using an energy ranging from about 120 KeV to about 540 KeV and a dose of at least about 1.5E14 atoms/cm2
Data Source
AI summary
The present invention provides a method for manufacturing a semiconductor device. In one embodiment, the method for manufacturing the semiconductor device includes a method for manufacturing a zener diode, including among others, forming a doped well (240) within a substrate (210) and forming a suppression implant (420) within the substrate (210). The method for manufacturing the zener diode may further include forming a cathode (620) and an anode (520) within the substrate (210), wherein the suppression implant (420) is located proximate the doped well (240) and configured to reduce threading dislocations.


