Surface Cache Hint-Based Eviction in Tiled Pixel Processing
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Solution Overview
Problem
In a tiled architecture, the pixel cache experiences significant thrashing due to the eviction of shared pixel data between screen tiles, leading to inefficient memory access and reduced cache efficiency, as data needed for future operations is prematurely evicted.
Innovation Solution
A subsystem is configured to cache data by identifying cache lines with higher hint values, which are likely to be needed again, and prioritizing their retention while evicting lines with lower hint values, and throttling fetch requests to prevent premature eviction of necessary data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If pixel data is cached in a simple pixel cache unit, then memory bandwidth is improved for overlapping regions, but cache thrashing occurs when data is prematurely evicted before being needed again
Solution Approach 1:
The patent changes the cache eviction parameter from simple LRU (least recently used) to a priority-based system where cache lines are assigned priority values based on their likelihood of being needed again. This allows the cache to retain high-priority lines (those needed for future tiles) while evicting low-priority lines, preventing thrashing and maintaining cache efficiency.
Solution Approach 2:
The patent performs preliminary action by calculating and assigning priority values to cache lines before eviction decisions are made. The priority values are determined in advance based on factors like tile overlap patterns and access probabilities, allowing the cache controller to make informed retention decisions rather than purely reactive evictions.
2Reliability
If cache size is increased to reduce thrashing, then more data can be retained, but device complexity and memory usage increase
Solution Approach 1:
Instead of increasing cache size, the patent changes the eviction policy parameter from uniform treatment of all cache lines to differentiated priority-based treatment. This allows the same cache size to retain more useful data by selectively preserving high-priority lines and evicting low-priority ones, improving efficiency without additional hardware resources.
3Productivity
If data is evicted to make room for new data, then cache space is maintained, but future data access requires re-fetching from global memory
Solution Approach 1:
The patent changes the eviction timing parameter by using priority values to determine which data to retain longer. High-priority cache lines are protected from eviction even when cache is full, ensuring that frequently needed data remains in cache and doesn't require time-consuming re-fetches from global memory.
Solution Approach 2:
The system uses feedback from tile processing patterns to dynamically adjust priority values. By monitoring which regions are likely to be accessed again based on tile overlap and processing order, the cache controller adapts its retention decisions to minimize future miss penalties.
Data Source
AI summary
A surface cache stores pixel data on behalf of a pixel processing pipeline that is configured to generate screen tiles. The surface cache assigns hint levels to cache lines storing pixel data according to whether that pixel data is likely to be needed again. When the pixel data is needed to process a subsequent tile, the corresponding cache line is assigned a higher hint value. When the pixel data is not needed again, the corresponding cache line is assigned a lower hint value. The surface cache is configured to preferentially evict cache lines having a lower hint value, thereby preserving cache lines that store pixel data needed for future processing. In addition, a fetch controller is configured to throttle the rate at which fetch requests are issued to the surface cache to prevent situations where pixel data needed for future operations becomes prematurely evicted.