Surface-Mount Transistor Placement on PCB Via Pads for Heat Dissipation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing power switching devices in induction cooktop inverters, such as D2PAK packages, face challenges in thermal dissipation due to their inability to be directly attached to traditional heat sinks, leading to inefficient heat management and higher costs when used in high-power applications.

Innovation Solution

A printed circuit board design that incorporates surface mount transistors soldered onto pads with through-hole vias, allowing thermal connection to a heat sink through a thermal interface, enhancing heat dissipation by reducing thermal resistance and enabling efficient heat transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If D2PAK surface mount devices are used to reduce cost and improve assembly ease, then device cost and assembly complexity are reduced, but thermal dissipation capability deteriorates due to inability to directly attach to traditional heat sinks

Engineering Contradiction:
Improveassembly easeVSAvoidthermal dissipation
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent utilizes the vertical dimension by creating elevated thermal pathways through via holes that extend from the mounting surface into the PCB substrate. This allows heat to be conducted away from the D2PAK device in the vertical direction through multiple copper layers and via structures, compensating for the lack of direct heatsink attachment capability inherent in surface mount packages.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The PCB substrate itself acts as an intermediary thermal management system. Through the implementation of thermal vias, copper pours, and multi-layer conductive structures, the PCB serves as a heat spreader and conduction path, mediating between the D2PAK device and the ultimate heat dissipation surfaces, thereby enabling effective thermal management without direct device-to-heatsink contact.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If through-hole vias are used to thermally connect surface mount devices to heat sinks, then thermal resistance is reduced and heat transfer efficiency is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvethermal resistanceVSAvoidmanufacturing complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The via holes serve multiple functions simultaneously: they provide electrical connectivity between different PCB layers, act as thermal conduction pathways, and structurally anchor the copper thermal management structures. This multi-functionality reduces the need for separate dedicated thermal via structures, thereby simplifying manufacturing despite the enhanced thermal performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The thermal management system employs composite conductive structures combining copper layers, solder fills, and PCB substrate materials. These composite structures are integrated into the standard PCB manufacturing process, allowing complex thermal pathways to be created using conventional multi-layer PCB fabrication techniques rather than requiring specialized post-processing steps.

Inventive Principle:
Principle #40Composite materials

3Productivity

If surface mount transistors are used instead of through-hole devices, then assembly time is reduced and cost is decreased, but thermal management capability is compromised

Engineering Contradiction:
Improveassembly timeVSAvoidheat dissipation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

Thermal management pathways are pre-integrated into the PCB design and manufacturing process itself. Thermal vias, copper pours, and conductive layers are created during standard PCB fabrication before component assembly, establishing ready-made heat conduction pathways that will be immediately functional when the surface mount devices are installed, eliminating the need for separate thermal management assembly steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges electrical and thermal management functions into a single integrated PCB structure. The same copper layers and via structures that provide electrical connectivity also serve as thermal conduction pathways, combining what would traditionally be separate electrical routing and thermal management systems into a unified design that simplifies both manufacturing and assembly.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively manages heat dissipation for D2PAK devices in induction cooktop inverters, maintaining thermal efficiency and reducing assembly time while using cost-effective materials and structures.

Implementation Method 1

allowing thermal connection to a heat sink through a thermal interface, enhancing heat dissipation by reducing thermal resistance and enabling efficient heat transfer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP4601421A1Placement of power switching devices on through holes via pads
Publication Date: 2025.08.13 WHIRLPOOL CORP
  • EP4601421A1 patent drawingFigure 1~2
  • EP4601421A1 patent drawingFigure 3~4
  • EP4601421A1 patent drawingFigure 5

AI summary

A printed circuit board (10) includes a substrate (16) extending in first and second lateral directions (18, 20) between respective sides (22, 24) of a perimeter (26) defined between first and second faces (28, 30). A DC bus capacitor (32) is electrically connected to a DC BUS (31) and is mounted on the first face (28) of the substrate (16). At least one resonant load capacitor (34) is mounted on the first face (28) of the substrate (16). At least one surface mount transistor (36) is mounted on the second face (30) of the substrate (16) and electrically connected with the DC bus capacitor (32) and the resonant load capacitor (34) through the substrate (16).