Surface-Normal Optical Interface with Thermal-Optic Compensation

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Solution Overview

Problem

Current optical coupling techniques for silicon-photonic chips face challenges such as mode field size mismatch, polarization sensitivity, and complex integration processes, particularly when coupling light in and out of silicon chips for off-chip communications.

Innovation Solution

A surface-normal optical interface is designed using a silicon chip with a silicon waveguide and an interface layer, featuring a 45-degree mirror and a SiON spot-size converter, which enables efficient, polarization-insensitive, and broad-bandwidth coupling with relaxed alignment requirements, and includes an optical gain chip to form a lasing cavity with thermal-optic coefficient compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If grating couplers are used for vertical coupling, then alignment requirements are relaxed and coupling losses are reduced, but optical bandwidth is limited and polarization sensitivity increases

Engineering Contradiction:
Improvealignment requirementsVSAvoidoptical bandwidth and polarization sensitivity
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent introduces an interface layer with an interface waveguide as an intermediary between the silicon waveguide and external optical components. This interface waveguide acts as a mediator that converts the small mode field of the silicon waveguide to a larger mode field, enabling efficient coupling while maintaining broad bandwidth and polarization insensitivity. The interface layer material is specifically designed to facilitate this mode conversion.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If edge coupling with spot-size converters is used, then coupling efficiency and bandwidth are improved with polarization insensitivity, but integration process complexity increases due to deep etching and substrate thinning

Engineering Contradiction:
Improvecoupling efficiency and bandwidthVSAvoidintegration process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from in-plane edge coupling to out-of-plane vertical coupling by introducing a surface-normal interface. The interface waveguide channels light in a direction parallel to the chip surface, and a mirror reflects the light to exit in the surface-normal direction. This dimensional change eliminates the need for deep etching and substrate thinning while maintaining coupling efficiency and bandwidth.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If a lasing cavity is formed with optical gain material, then light emission stability is improved, but thermal-optic coefficient mismatch causes mode-hopping

Engineering Contradiction:
Improvelight emission stabilityVSAvoidmode-hopping due to thermal-optic coefficient mismatch
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent carefully selects the length of the interface waveguide and optical gain waveguide to adjust the effective thermal-optic coefficient of the lasing cavity. By changing the length parameters of these waveguides, the effective TOC can be matched to the silicon TOC, eliminating mode-hopping while maintaining stable light emission. This parameter optimization allows the system to achieve both reliability and compositional stability.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If wafer-scale assembly is implemented, then mass manufacturing is enabled, but alignment precision requirements become more stringent

Engineering Contradiction:
Improvemass manufacturing capabilityVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the optical coupling system into distinct functional layers: a silicon layer with silicon waveguide, an interface layer with interface waveguide, and an optical gain chip with RSOA. This segmentation allows each layer to be optimized and fabricated separately, then assembled at wafer-scale with relaxed alignment requirements. The interface layer specifically designed for mode conversion enables this relaxed alignment while maintaining coupling efficiency.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides low integration loss, stable light emission, and reduced mode-hopping, making it suitable for uncooled applications by minimizing thermal-optic coefficient mismatch and allowing wafer-scale assembly with reduced alignment precision.

Implementation Method 1

a mirror, which is oriented to reflect the optical signal from the interface waveguide in a surface-normal direction so that the optical signal exits a surface normal coupler on the top surface of the semiconductor chip

Methodology Applied
Scientific EffectReflection: Reflection

Implementation Method 2

the reflected optical signal that exits the surface normal coupler feeds into the RSOA, whereby the RSOA, the interface waveguide, the mirror, the silicon waveguide and a reflector, which is optically coupled to the silicon waveguide, form a lasing cavity

Methodology Applied
Scientific EffectStimulated emission: Laser

Implementation Method 3

lI and lOGM are selected so that lI≈lOGM*(dnOGM/dT−dnSi/dT)/(dnSi/dT−dnI/dT), whereby the effective TOC of a section of the lasing cavity that passes through the optical gain material and the interface material is substantially the same as the TOC of silicon

Methodology Applied
Scientific EffectThermal-optic coefficient compensation: Thermal Expansion

Data Source

PatentUS9964702B1Surface-normal optical coupling interface with thermal-optic coefficient compensation
Publication Date: 2018.05.08 ORACLE INT CORP
  • US9964702B1 patent drawing
  • US9964702B1 patent drawing
  • US9964702B1 patent drawing

AI summary

The disclosed embodiments provide a system that implements an optical interface. The system includes a semiconductor chip with a silicon layer, which includes a silicon waveguide, and an interface layer (which can be comprised of SiON) disposed over the silicon layer, wherein the interface layer includes an interface waveguide. The system also includes an optical coupler that couples an optical signal from the silicon waveguide in the silicon layer to the interface waveguide in the interface layer, wherein the interface waveguide channels the optical signal in a direction parallel to a top surface of the semiconductor chip. The system additionally includes a mirror, which is oriented to reflect the optical signal from the interface waveguide in a surface-normal direction so that the optical signal exits the top surface of the semiconductor chip.