Surface RF PCB Interconnect for Via-Free Layer Transitions
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Solution Overview
Problem
Conventional RF circuit designs using vias in printed circuit boards (PCBs) face challenges such as space inefficiency and signal leakage due to the need for holes through layers, which can impact performance and increase manufacturing costs.
Innovation Solution
A vertical launch interconnection system that electrically couples different layers of a multilayered PCB without using holes, formed along the outer surface of stripline boards using additive manufacturing techniques, with an electrically conductive wall to isolate and enclose the interconnect, preventing signal leakage and reducing system losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vias are used to connect different layers in PCB, then electrical connection between layers is achieved, but valuable space is consumed and signal leakage occurs
Solution Approach 1:
The patent transitions from traditional via connections that pass through the PCB thickness to surface-mounted interconnects that travel along the outer surface. This dimensional change allows connections to be made without consuming internal via space, while the conductive traces on the surface provide efficient electrical coupling between layers without the space penalty of through-holes.
Solution Approach 2:
The invention extracts the interconnection function from the interior of the PCB (via holes) and relocates it to the outer surface. By removing the need for through-holes and replacing them with surface-mounted conductive traces and launch pads, the patent eliminates the space consumption and signal leakage issues associated with traditional vias while maintaining electrical connectivity between layers.
2Reliability
If vias are formed through PCB layers, then electrical connection is provided, but signal leakage and high field density occur
Solution Approach 1:
The invention extracts the interconnection function from the interior of the PCB (via holes) and relocates it to the outer surface. By removing the need for through-holes and replacing them with surface-mounted conductive traces and launch pads, the patent eliminates the space consumption and signal leakage issues associated with traditional vias while maintaining electrical connectivity between layers.
Solution Approach 2:
The patent introduces launch pads as intermediary elements that facilitate controlled signal transitions between layers. These launch pads act as mediators that manage the electromagnetic field distribution during layer transitions, preventing the uncontrolled field density and signal leakage that occur with traditional vias while ensuring reliable electrical connection.
3Reliability
If traditional via methods are used, then layer connection is achieved, but manufacturing costs increase
Solution Approach 1:
The patent merges the interconnect structure with the outer surface of the PCB, eliminating the need for separate via fabrication processes. By integrating the connection functionality into the surface-mounted conductive traces and launch pads, the invention consolidates manufacturing steps and reduces the complexity and cost associated with drilling, plating, and finishing through-holes while maintaining reliable interconnection performance.
Data Source
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AI summary
Systems and methods described herein are provided for electrically coupling conductors within a multilayered printed circuit board (PCB) using an interconnect formed along an outer surface of one or more stripline boards making up the multilayered PCB. The multilayered PCB may include first and second stripline boards each having multiple dielectric layers. A first conductor may be formed in the first stripline between the multiple dielectric layers and a second conductor may be formed in the second stripline between the multiple dielectric layers. The interconnect may be formed over an outer surface the dielectric layers such that the interconnect extends from the first conductor to the second conductor. An electrically conductive wall may be formed over the edge or side portion of the dielectric layers to form a cavity that encloses the interconnect and the outer surface of the multilayered PCB.