Surface Strap Formation for DRAM Trench Capacitors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional buried straps in DRAM structures face challenges such as increased electric resistance due to high integration and shrinking dimensions, along with complications in forming and controlling gate channel regions, leading to performance issues like dark current and strong electric field interference.
Innovation Solution
A method for forming a conductive surface strap on the substrate, which involves creating a conductive connection layer, forming a poly-Si layer, performing selective ion implantation, etching to form a recess, and filling with insulation material, thereby simplifying the process and reducing electric resistance by avoiding the need for a buried strap at the trench capacitor collar.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buried strap is used to electrically connect the drain and the deep trench capacitor, then the electrical connection is established, but the strong electric field causes increased electric resistance and device performance degradation
Solution Approach 1:
The patent transitions from a conventional buried strap configuration (within the substrate depth) to a surface strap configuration (on the substrate surface). This dimensional change relocates the electrical connection path from the vertical depth dimension to the horizontal surface dimension, thereby avoiding the strong electric field region near the drain while maintaining electrical connectivity between the drain and deep trench capacitor.
Solution Approach 2:
The patent extracts the strap structure from its traditional buried position within the substrate and relocates it to the substrate surface. By taking out the strap from the harmful electric field environment, the design eliminates the interaction between the strong electric field and the strap, preventing electric resistance increase and device performance degradation.
2Object-affected harmful factors
If the gate channel region is arranged in a deeper trench to keep distance from the buried strap, then electric field interference is reduced, but the manufacturing complexity and difficulty increase significantly
Solution Approach 1:
The patent extracts the strap from the substrate interior and places it on the surface, thereby eliminating the need to relocate the gate channel region to deeper trenches. This extraction approach resolves the electric field interference problem without imposing the manufacturing complexity of high aspect ratio gate trenches.
3Productivity
If high integration and dimension shrinkage are implemented, then device density increases, but the electric resistance of the buried strap dramatically increases
Solution Approach 1:
The patent changes the strap configuration from vertical/buried to horizontal/surface, allowing the strap to extend laterally across the substrate surface. This dimensional change enables longer contact areas and alternative current paths that maintain low electric resistance even as devices are shrunk and integrated at higher densities.
4Reliability
If a single buried strap is formed at the collar of the trench capacitor, then electrical connection is achieved, but the process complexity increases and needs improvement
Solution Approach 1:
The patent forms the strap on the substrate surface rather than burying it at the trench capacitor collar. This surface-level formation simplifies the manufacturing process by eliminating complex steps such as deep trench etching, collar formation, and precise strap placement within the trench structure, while still achieving the required electrical connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces electric resistance between the drain and deep trench capacitor, simplifies the process by intervening between deep trench capacitor and gate procedures, and allows for a larger contact area, mitigating the negative influence of strong electric fields on device performance.
Implementation Method 1
performing a selective ion implantation with an angle to make part of the poly-Si layer above the conductive connection layer an undoped poly-Si layer
Data Source
AI summary
A method for forming a surface strap includes forming a deep trench capacitor having a conductive connection layer on its surface in the substrate and the conductive connection layer in contact with the conductive layer; forming a poly-Si layer covering the pad layer and the conductive connection layer; performing a selective ion implantation with an angle to make part of the poly-Si layer an undoped poly-Si layer; removing the undoped poly-Si layer to expose part of the conductive connection layer; etching the exposed conductive connection layer to form a recess; removing the poly-Si layer to make the exposed conductive connection layer a conductive connection strap; filling the recess with an insulation material to form a shallow trench isolation; exposing the conductive layer; and selectively removing the conductive layer to form a first conductive strap which forms the surface strap together with the conductive connection strap.