Surrogate Model for Semiconductor Process Corner Derivation
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Solution Overview
Problem
In deep submicron semiconductor manufacturing, achieving reasonable yield is challenging due to manufacturing variability, with existing methods failing to accurately model and predict yields for complex circuits as they often rely on unrealistic 'general-purpose' process corners that do not account for individual circuit sensitivities to environmental conditions, leading to trade-offs that can result in zero-yielding solutions.
Innovation Solution
A system and method for modeling process variations and determining parametric yield by deriving highly significant corners using a surrogate model, allowing for simultaneous assessment of multiple process parameters and circuit metrics, which enables faster and more accurate simulations to identify physically attainable yield limits and optimize manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If Monte Carlo based simulation is used to model and predict yields, then yield prediction capability is improved, but computational complexity and time consumption increase significantly
Solution Approach 1:
The patent creates a simplified copy of the complex circuit (surrogate model) that replicates the essential yield behavior. This surrogate model is a reduced-complexity representation that can be simulated much faster than the full circuit while still providing accurate yield predictions. The surrogate model captures the critical relationships between process parameters and circuit performance without including all the detailed components of the original circuit.
Solution Approach 2:
The patent employs inexpensive, computationally lightweight surrogate models that can be rapidly instantiated and discarded. These surrogate models require minimal computational resources compared to full Monte Carlo simulations, allowing for quick yield assessments and iterative optimization without the heavy computational burden of traditional methods.
2Adaptability or versatility
If general-purpose process corners are derived for yield analysis, then simulation coverage is improved, but physical realism and accuracy for specific circuits deteriorate
Solution Approach 1:
The patent transitions from uniform, general-purpose process corners to localized, circuit-specific process corners. The surrogate model identifies which process parameters are actually critical for each specific circuit or circuit path, and derives process corners that reflect those local sensitivities. This means different parts of the design space are explored with appropriate precision - only the parameters that matter for each circuit are tightly controlled and analyzed.
Solution Approach 2:
The patent makes the process corner derivation dynamic and adaptive rather than static and fixed. The surrogate model continuously identifies the most sensitive process parameters for the current design under analysis, and adjusts the process corners accordingly. This dynamic approach allows the same methodology to be applied across different circuits and design iterations, automatically adapting to the specific sensitivities of each case.
3Reliability
If process conditions are shifted to improve yield for one circuit, then that circuit's yield is improved, but other circuits on the same wafer may experience yield deterioration
Solution Approach 1:
The patent merges the yield analysis of multiple circuits into a unified framework using the surrogate model. Instead of analyzing circuits independently and then trying to reconcile conflicting requirements, the surrogate model simultaneously evaluates multiple circuits and their sensitivities to process parameters. This integrated approach identifies process corners that optimize the overall wafer yield by considering all circuits together, finding compromises and synergies that single-circuit analysis would miss.
Solution Approach 2:
The surrogate model serves multiple functions: it analyzes individual circuit sensitivities, derives appropriate process corners, predicts yield for multiple circuits simultaneously, and identifies correlations between different circuits' performance. This universal tool replaces multiple separate analysis methods and provides a comprehensive view of wafer-level yield that accounts for the interdependencies between different circuits on the same wafer.
Data Source
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AI summary
A system and method for deriving semiconductor manufacturing process corners using surrogate simulations is disclosed. The method may be used to determine individual performance metric yields, the number of out-of-specification conditions for a given number of simulation samples, and a total yield prediction for simultaneous multi-variable conditions. A surrogate simulation model, such as a Response Surface Model, may be generated from circuit simulation data or parametric data measurements and may be executed using a large number of multi-variable sample points to determine process corners defining yield limits for a device. The model may also be used to simulate process shifts and exaggerated input ranges for critical device parameters. In some embodiments, the derived process corners may better represent physically possible worst-case process corners than traditional general-purpose process corners, and may address differences in process sensitivities for individual circuits of the device.