Suspended Charge Storage Regions for Non-Volatile Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor memory devices evolve to increase storage capacity in smaller areas, they face challenges with parasitic capacitances and interference between charge storage regions, leading to data retention issues and performance degradation due to coupling effects between floating gates and control gates.
Innovation Solution
The implementation of suspended charge storage regions, where the charge storage regions are separated from adjacent features by voids, reducing parasitic capacitances and interference by using a void instead of solid dielectric materials, which have a lower dielectric constant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If charge storage regions are formed using solid dielectric materials, then structural support and isolation are provided, but parasitic capacitances and interference between charge storage regions increase
Solution Approach 1:
The patent removes the solid dielectric material from between the charge storage regions and replaces it with a void (air gap). This extraction of the dielectric material eliminates the source of parasitic capacitance while maintaining the necessary isolation between adjacent charge storage regions, directly resolving the contradiction between structural support and parasitic capacitance reduction.
Solution Approach 2:
The void created by removing the dielectric material acts as an inert environment with extremely low dielectric constant (approximately 1.0 for air/vacuum compared to typical solid dielectrics with constants of 3.0-10.0 or higher). This inert atmospheric replacement minimizes electromagnetic coupling and parasitic capacitance effects between adjacent charge storage regions.
2Productivity
If floating gates and control gates are positioned close together to increase density, then storage capacity per area increases, but coupling effects between gates increase causing performance degradation
Solution Approach 1:
The patent extracts the dielectric material that would normally fill the space between adjacent memory strings, creating voids that separate the floating gates and control gates of neighboring strings. This allows gates to be positioned closer together for higher density while the voids prevent harmful coupling effects, simultaneously achieving both high density and performance.
Solution Approach 2:
The void acts as an intermediary medium between adjacent gate structures. With a dielectric constant of approximately 1.0, the void serves as an ideal mediator that allows close spacing of gates for high density while minimizing the electromagnetic coupling that would otherwise occur between adjacent gates in solid dielectric environments.
3Reliability
If dielectric material is used to separate charge storage regions, then physical isolation is achieved, but the dielectric constant creates parasitic capacitance that affects data retention
Solution Approach 1:
The patent removes the dielectric material entirely from the regions between charge storage elements, replacing it with voids. This extraction eliminates the parasitic capacitance that would cause charge leakage and data retention problems, while the voids still provide sufficient physical isolation to prevent unwanted electrical interaction between adjacent storage regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data retention and improves memory performance by minimizing coupling effects between charge storage regions, allowing for higher density and efficiency in non-volatile storage.
Implementation Method 1
separated from adjacent features by voids, reducing parasitic capacitances and interference
Implementation Method 2
reducing parasitic capacitances and interference by using a void instead of solid dielectric materials, which have a lower dielectric constant
Data Source
AI summary
Suspended charge storage regions are utilized for non-volatile storage to decrease parasitic interferences and increase charge retention in memory devices. Charge storage regions are suspended from an overlying intermediate dielectric material. The charge storage regions include an upper surface and a lower surface that extend in the row and column directions. The upper surface of the charge storage region is coupled to the overlying intermediate dielectric material. The lower surface faces the substrate surface and is separated from the substrate surface by a void. The charge storage region includes a first vertical sidewall and a second vertical sidewall that extend in the column direction and a third vertical sidewall and fourth vertical sidewall that extend in the row direction. The first, second, third, and fourth vertical sidewall are separated from neighboring features of the non-volatile memory by the void. The void may include a vacuum, air, gas, or a liquid.