Suspended Silicon Photonics Fabrication via Metal Etch Channels

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional silicon integrated photonic systems face challenges in fabricating photonic devices with improved methods that enhance optical power isolation and device integration, particularly in silicon-on-insulator (SOI) technology.

Innovation Solution

A method involving the formation of metal-dielectric structures on a semiconductor substrate, followed by selective metal etching to create photonic devices such as suspended rib waveguides, grating couplers, and phase modulators, with additional material injection to fill etched spaces, utilizing CMOS processes for hybrid electronic-photonic device fabrication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional SOI technology is used for fabrication, then optical power isolation is achieved through BOX layer, but device integration and fabrication flexibility are limited

Engineering Contradiction:
Improveoptical power isolationVSAvoiddevice integration
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the fabrication process into distinct metal layer formation steps, where each metal layer can be independently patterned and etched. This allows different regions of the device to have different metal configurations, enabling both optical isolation in photonic regions and electrical connectivity in electronic regions, thus resolving the contradiction between isolation and integration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The metal layers serve multiple functions: they provide electrical interconnects for electronic devices, form etch channels for defining photonic device regions, and create suspended structures for optical waveguides. This multi-functionality allows a single fabrication approach to achieve both optical isolation and device integration

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If dedicated photonic processes are used, then optical device performance is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveoptical device performanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges electronic and photonic device fabrication into a single integrated process using standard CMOS-compatible steps. Metal layers are formed and patterned using the same deposition and lithography tools used for electronic interconnects, eliminating the need for separate photonic fabrication lines while maintaining optical device performance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The metal layers automatically serve dual purposes: they provide electrical connectivity where needed and define photonic device boundaries where etched away. The etch channels self-organize to remove metal from photonic regions while preserving it in electronic regions, reducing the need for additional process steps

Inventive Principle:
Principle #25Self-service

3Reliability

If metal layers are removed to form photonic devices, then optical power isolation is enhanced, but structural support may be compromised

Engineering Contradiction:
Improveoptical power isolationVSAvoidstructural support
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies different metal layer configurations to different regions of the device. In photonic regions, metal layers are completely removed to achieve optical isolation. In electronic regions and support areas, metal layers are retained to provide structural support and electrical connectivity. This local differentiation resolves the contradiction between isolation and strength

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4038426B1Integrated electronic-photonic devices, systems and methods of making thereof
Publication Date: 2026.03.18 CALIFORNIA INST OF TECH
  • EP4038426B1 patent drawingFigure 1A~3B
  • EP4038426B1 patent drawingFigure 4A~4C
  • EP4038426B1 patent drawingFigure 4D~4E

AI summary

A method of fabricating a photonic device includes in part, forming a multitude of metal and dielectric layers over a semiconductor substrate to form a structure. The metal layers form a continuous metal trace that characterize an etch channel. At least one of the metal layers extends towards an exterior surface of the structure such that when the structure is exposed to a metal etch, the metal etch removes the metal from the exterior surface of the structure and flows through the etch channel to fully etch the metal layers. The metal etch leaves behind a dielectric structure characterizing a photonic device. The photonic device may be a suspended rib waveguide, a suspended channel waveguide, a grating coupler, an interlayer coupler, a photodetector, a phase modulator, an edge coupler, and the like. A photonics system may include one or more of such devices.