Runtime SVM Classifier for SoC Security Block Monitoring
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Solution Overview
Problem
Existing security verification processes for integrated circuit devices are incomplete due to missing specifications on how security blocks can be compromised, making it difficult to prevent unauthorized access to sensitive information.
Innovation Solution
A method using pre-silicon functional verification data to generate a Support Vector Machine (SVM) model that classifies secure and insecure behavior, implemented as a runtime classifier to detect and prevent unauthorized access to security blocks during chip operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing security verification processes are used, then verification can be performed, but the detection and prevention of unauthorized access remains extremely difficult due to missing specifications on how security blocks can be compromised
Solution Approach 1:
The patent applies preliminary action by generating an SVM model during the design phase using pre-silicon verification data to capture secure behavior patterns. This model is trained before the chip is manufactured and deployed, allowing the runtime detector to efficiently identify insecure behavior without requiring complex real-time analysis. The model encapsulates knowledge about secure operations obtained during earlier verification stages.
Solution Approach 2:
The patent introduces an intermediary approach by inserting a runtime detector between the security block and the rest of the system. This detector uses the pre-trained SVM model to classify behavior as secure or insecure, acting as a mediator that translates complex security verification requirements into actionable runtime detections. The intermediary detector simplifies the verification process by focusing only on behavior classification rather than complete specification coverage.
2Ease of manufacture
If chip manufacturers do not publish specifications on how security blocks can be compromised, then design and manufacturing remains simple, but security verification becomes fundamentally incomplete
Solution Approach 1:
The patent applies self-service by enabling the security verification system to generate its own training data from pre-silicon verification traces without requiring external specification documents. The system automatically extracts feature vectors from verification traces and uses them to train the SVM model, making the verification process self-sufficient. This eliminates the need for manufacturers to publish detailed compromise scenarios while still achieving comprehensive security verification.
Solution Approach 2:
The patent implements feedback by using pre-silicon verification data to train the SVM model, which then feeds back into the runtime detection system. The verification process itself generates the knowledge needed for security detection, creating a feedback loop where verification results directly improve security capabilities. This feedback mechanism allows the system to learn secure behavior patterns from actual verification traces rather than relying on external specifications.
3Reliability
If runtime detection using SVM model is implemented, then detection and prevention of insecure behavior improves, but device complexity increases
Solution Approach 1:
The patent reduces runtime complexity by performing the complex SVM model training during the pre-silicon verification phase rather than at runtime. The model is generated offline using verification traces, and only the lightweight classification inference is performed during chip operation. This preliminary action separates the computationally intensive model generation from the runtime detection, significantly reducing the complexity burden during actual system operation.
Solution Approach 2:
The patent applies the principle of using a disposable training model that is generated once during verification and then deployed for runtime detection. The complex SVM model is created as a static artifact during design, and the runtime system only needs to perform simple classification using this pre-computed model. This approach replaces complex real-time verification with a simpler runtime detection system that uses the pre-generated model, reducing operational complexity while maintaining high detection accuracy.
Data Source
AI summary
A runtime classifier hardware circuit is incorporated into an electronic device for implementing hardware security by storing a support vector model in memory which is derived from pre-silicon verification data to define secure behavior for a first circuit on the electronic device; monitoring input and/or output signals associated with the first circuit using the runtime classifier hardware circuit which compares the input and/or output signals to the support vector model to detect an outlier input signal and/or outlier output signal for the first circuit; and blocking the outlier input and/or output signal from being input to or output from the first circuit.