Swap Area Trim Control for Faster Startup on Flash Storage

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Solution Overview

Problem

The performance of semiconductor storage devices is reduced due to wear levelling processes during block replacement, and existing trim command methods either reduce overall operation speed or are incompatible with certain OS or file systems, leading to longer startup times and reduced user convenience.

Innovation Solution

An information processing apparatus with a swap enabling unit, first trim process unit, and checking unit that controls trim processes based on swap area usage status, enabling efficient trim execution during startup and shutdown to minimize performance deterioration and startup time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If trim process is performed on swap area every time information processing apparatus is started, then semiconductor storage device performance is maintained, but startup time is extended

Engineering Contradiction:
Improvesemiconductor storage device performanceVSAvoidstartup time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by checking swap area usage status before deciding whether to execute trim process during startup. The checking unit determines if trim is necessary based on whether swap area is actually being used, avoiding unnecessary trim operations when swap area usage is disabled or minimal, thus reducing startup time while maintaining performance when needed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the trim execution strategy based on real-time swap area usage status. The checking unit monitors whether swap area is enabled and being used, and the control unit adaptively decides whether to perform trim process during startup. This dynamic approach allows the system to optimize between performance maintenance and startup speed based on actual usage conditions

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If sequential trim function is used, then trim commands are automatically issued, but overall operation speed is reduced

Engineering Contradiction:
Improveautomatic trim issuanceVSAvoidoperation speed
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

Instead of continuously issuing trim commands for all storage areas (excessive action), the system selectively issues trim commands only for swap area when it is actually being used (partial action). The checking unit determines whether swap area usage is enabled, and the control unit performs trim process only in that specific condition, avoiding unnecessary trim operations that would slow down overall system operation while still maintaining automatic trim functionality when needed

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12474860B2Information processing apparatus, control method of information processing apparatus, and non-transitory storage medium
Publication Date: 2025.11.18 CANON KK
  • US12474860B2 patent drawing
  • US12474860B2 patent drawing
  • US12474860B2 patent drawing

AI summary

An information processing apparatus including a semiconductor storage device according to one aspect of the present disclosure includes: a swap enabling unit configured to enable a swap area provided in the semiconductor storage device during startup of the information processing apparatus; a first trim process unit configured to perform a first trim process of notifying the semiconductor storage device of a storage area that no longer requires the swap area; a checking unit configured to check usage status of the swap area and save the usage status in a nonvolatile storage area during shutdown of the information processing apparatus; and a first control unit configured to control whether or not to perform the first trim process based on the usage status of the swap area saved in the nonvolatile storage area during startup of the information processing apparatus.