Swappable 1-Wire Pin Detection for I/O and CAP Assignment
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Solution Overview
Problem
The existing 1-Wire communications bus architecture lacks flexibility in pin configuration, limiting the ability to differentiate between I/O and CAP pins, which restricts the design of printed circuit boards and circuit modules.
Innovation Solution
The introduction of swappable pins in 1-Wire peripherals allows each pin to function as either an I/O pin or a CAP pin, enabling detection of pin characteristics at device startup and generating flag signals to differentiate configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed pin configuration is used in 1-Wire peripherals, then device structure is simple and manufacturing is easy, but flexibility in PCB design and module configuration is limited
Solution Approach 1:
The patent implements dynamic pin configuration where pins can be assigned different functions (I/O or CAP) based on detection results. The system transitions from static pin assignment to dynamic assignment by detecting signal characteristics during startup and configuring pins accordingly, enabling the same hardware to adapt to different connection scenarios without requiring multiple device variants.
Solution Approach 2:
The peripheral automatically detects its own pin configuration during startup by monitoring signal rise times on each pin and self-configures the pin functions accordingly. This self-detection and self-configuration mechanism eliminates the need for external configuration circuits or manual setup, allowing the device to autonomously adapt to its connection environment.
2Adaptability or versatility
If swappable pins with detection circuitry are added to differentiate I/O and CAP pins, then flexibility and adaptability are improved, but device complexity increases
Solution Approach 1:
The patent replaces physical/mechanical pin configuration methods (such as separate I/O and CAP pins with fixed assignments) with an electrical detection and software-based configuration system. By measuring signal characteristics (rise time) electrically during startup, the system determines pin functions without requiring additional mechanical switches, jumpers, or physical configuration elements.
Solution Approach 2:
The patent makes each pin capable of serving multiple functions (either I/O or CAP) based on detection results. Instead of dedicating specific pins to specific functions, the system allows any pin to be configured for either function, maximizing the utility of each pin and reducing the need for additional dedicated pins or configuration hardware.
3Reliability
If pin configuration is determined at device startup through signal detection, then correct pin assignment is ensured, but startup time and initialization period are extended
Solution Approach 1:
The patent performs pin detection during the startup initialization period, accepting a temporary extension of startup time as a trade-off for ensuring correct pin configuration. The detection process monitors signal characteristics for a limited duration sufficient to distinguish between I/O and CAP pin behaviors, then proceeds with configuration, balancing detection accuracy with startup time considerations.
Data Source
AI summary
Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments preform the following functions: detecting the initial phase of device startup; determining which of pins A and B is coupled to an I/O line (and thus is the I/O pin), and which is coupled to the storage capacitor (and thus is the CAP pin); and generating a flag signal indicating that determination to other circuitry within the peripheral. Detection of pin characteristics is determined at device startup by latching the fastest rising signal on pins A and B, flagging that signal line as being the I/O line, and preventing further changes to the latch output until the next startup cycle.