Sweep Dependency GPU Block Scheduling for Video Decoding
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Solution Overview
Problem
Current GPU block scheduling methods, such as diagonal scanning, lead to inefficiencies due to excessive synchronization overhead and idle waiting, resulting in low GPU utilization, especially when not all dependencies exist, with diagonal scheduling achieving only 50% efficiency.
Innovation Solution
Implementing a sweep dependency-based scheduling method that generates a dependency map to determine which GPU blocks depend on others, allowing for parallel execution and efficient scheduling, thereby reducing synchronization overhead and increasing GPU throughput to 80% efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If diagonal scanning scheduling is used, then GPU blocks can be scheduled in a systematic manner, but GPU utilization drops to 50% due to excessive synchronization overhead and idle waiting
Solution Approach 1:
The patent implements dynamic scheduling by generating a dependency map that captures actual data dependencies between GPU blocks, then using this map to dynamically assign blocks to execution units based on real-time availability and dependency status, replacing the static diagonal scanning approach with an adaptive system that adjusts scheduling decisions based on actual computational needs and data readiness
Solution Approach 2:
The system incorporates feedback mechanisms where the dependency map is continuously updated based on block execution status and data dependency resolution, allowing the scheduler to make informed decisions about which blocks to execute next, thereby optimizing GPU utilization by 50-80% compared to traditional diagonal scanning methods
2Productivity
If sweep dependency-based scheduling is implemented, then GPU throughput increases to 80% efficiency, but scheduling complexity increases due to dependency map generation and management
Solution Approach 1:
The system performs preliminary action by generating the dependency map before block execution begins, analyzing data dependencies between blocks and pre-determining execution order constraints. This upfront analysis eliminates the need for complex real-time dependency analysis during execution, reducing runtime scheduling complexity while maintaining high throughput
Solution Approach 2:
The dependency map serves as an intermediary data structure that mediates between the scheduler and GPU execution units, encapsulating complexity by pre-computing and storing dependency relationships. This intermediary structure allows the scheduler to make simple availability-based decisions without needing to analyze complex data dependency graphs during execution, thereby achieving 80% efficiency without proportional complexity increase
3Reliability
If all GPU blocks wait for neighbor pixels to be decoded, then data accuracy is ensured, but GPU blocks experience excessive idle waiting time
Solution Approach 1:
The patent applies partial action by having GPU blocks wait only for necessary neighbor pixel data when dependencies exist, rather than universally waiting for all neighbors. The dependency map enables the system to identify and execute blocks that can proceed independently, reducing idle waiting time while maintaining data accuracy for blocks that do require neighbor data, thereby achieving 50-80% GPU utilization efficiency
Data Source
AI summary
An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.