Semiconductor Switch Bias Circuit for Power-Off Turn-Off Stability
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Solution Overview
Problem
Semiconductor switches used in test apparatuses face instability in the no-power-supply state, where the on/off state depends on input and output terminal voltages, leading to unreliable operation.
Innovation Solution
A semiconductor switch design featuring an enhancement-type transistor with a first bias circuit for controlling the gate voltage during power supply and a second bias circuit that applies a voltage corresponding to the lower voltage between the terminals in a no-power-supply state, ensuring the gate-source voltage is below the threshold voltage, thus reliably turning off the transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a semiconductor switch uses an enhancement-type transistor without a second bias circuit, then the device complexity is reduced, but the reliability deteriorates in the no-power-supply state because the on/off state becomes unstable and depends on terminal voltages
Solution Approach 1:
The second bias circuit is configured to automatically activate in the no-power-supply state and preemptively clamp the gate voltage to the lower terminal voltage, preventing the transistor from entering an unstable state. This preliminary action ensures the switch turns off reliably before any problematic voltage conditions can develop.
Solution Approach 2:
The second bias circuit acts as an intermediary mechanism that intervenes between the terminal voltages and the gate voltage. By introducing this intermediate control layer, the patent mediates the interaction between terminal voltages and gate voltage, ensuring the gate voltage never exceeds the lower terminal voltage even when power supply is absent.
2Ease of operation
If the gate voltage is not controlled in the no-power-supply state, then the ease of operation is improved, but the reliability worsens because the switch may turn on unintentionally depending on terminal voltage levels
Solution Approach 1:
The second bias circuit is designed to automatically detect the no-power-supply state and self-activate without requiring external control signals. It autonomously compares terminal voltages and adjusts the gate voltage accordingly, making the system self-regulating and eliminating the need for additional control logic during power loss events.
Solution Approach 2:
The second bias circuit implements a feedback mechanism by continuously monitoring the terminal voltages and adjusting the gate voltage based on the lower terminal voltage level. This feedback loop ensures that even in the absence of power supply, the switch state remains controlled and predictable, preventing unintended activation.
3Reliability
If a second bias circuit is added to control gate voltage in no-power-supply state, then the reliability is improved, but the device complexity increases
Solution Approach 1:
The second bias circuit changes the operating parameter of the gate voltage based on the power supply state. In the no-power-supply state, it dynamically adjusts the gate voltage to match the lower terminal voltage, ensuring the transistor remains off. This parameter change approach allows a single circuit configuration to handle multiple operating conditions reliably.
Solution Approach 2:
The second bias circuit is designed to serve multiple functions: it operates as a voltage clamp during normal operation and as an automatic switch-off mechanism during power loss. This multi-functionality reduces the need for separate protection circuits, thereby limiting the increase in overall device complexity while maintaining high reliability.
Data Source
AI summary
A semiconductor switch is configured to conduct or cutoff a signal path from its first terminal to its second terminal. An enhancement-type first transistor is arranged between the first terminal and the second terminal. A first bias circuit is connected to apply a gate voltage VG that corresponds to a control signal VCNT to the gate of the first transistor when the power supply voltages VDD and VSS are supplied. A second bias circuit is connected such that a voltage that corresponds to the lower voltage of the voltages at the first terminal and the second terminal is applied to the gate of the first transistor when the power supply voltages VDD and VSS are not supplied.