Switch Bridge Arm Layout Using Mutual Inductance for Current Balance
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Solution Overview
Problem
In high power density power electronics systems, paralleled devices experience dynamic current unbalance due to asymmetrical layouts and different parasitic inductances, leading to gate voltage oscillation, overcurrent, and thermal stress unbalance, which can cause system instability and failure.
Innovation Solution
A switch circuit and power module design that balances dynamic currents through switches by utilizing common source inductance, specifically by adjusting mutual inductance and interconnection conductor lengths to equalize current flow across parallel switch bridge arms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple power devices are paralleled to increase current capability, then the current rating of the power electronics system is improved, but the dynamic current unbalance between paralleled devices occurs due to asymmetrical layout and different parasitic inductances
Solution Approach 1:
The patent intentionally introduces asymmetry by adding different dummy inductors to different paralleled devices. Specifically, a first dummy inductor is added in series with the source terminal of the first switch, and a second dummy inductor with different inductance value is added in series with the source terminal of the second switch. This deliberate asymmetric compensation counteracts the inherent asymmetric parasitic inductances in the power loop, achieving current balance among paralleled devices.
2Ease of operation
If parasitic inductances of paralleled devices are different due to asymmetrical layout, then device placement flexibility is improved, but gate voltage oscillation and thermal stress unbalance occur during switching transient
Solution Approach 1:
The patent introduces dummy inductors as intermediary elements between the control source and the switches. These dummy inductors serve as mediators that compensate for the asymmetric parasitic inductances in the power loops. By adding these intermediate inductance elements, the gate voltage oscillation caused by asymmetric parasitic inductances is suppressed, and the switching transient behavior is stabilized without restricting layout flexibility.
3Device complexity
If parasitic inductances are not compensated, then circuit simplicity is maintained, but overcurrent and thermal runaway occur during switching transient
Solution Approach 1:
The patent modifies the inductance parameters of the circuit by adding dummy inductors with specific inductance values. The first dummy inductor has a first inductance value and the second dummy inductor has a second inductance value, which are carefully selected to compensate for the parasitic inductances. This parameter change approach suppresses current oscillation and prevents overcurrent during switching transient, while the dummy inductors are designed to occupy minimal space and add minimal complexity to the overall circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The balanced dynamic currents significantly enhance the reliability of the switch circuit and power module, preventing instability and thermal runaway.
Implementation Method 1
A first mutual inductance is formed between the power loop and the first control loop
Data Source
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AI summary
A switch circuit (1) electrically connected to a power source (11) and a first control source (121) and including a plurality of switch bridge arms is provided. Each of the plurality of switch bridge arms includes a first switch (131) and a second switch (141) electrically connected in series. A loop formed by the first switch (131), the second switch (141) and the power source (11) is defined as a power loop. A loop formed by the first control source (121) and the first switch (131) is defined as a first control loop. A first mutual inductance is formed between the power loop and the first control loop. Among all the first switches (131, 13n), the first switch with the longer power loop has the smaller first mutual inductance.