Switch Buffer Overflow Management via Dynamic Supplemental Memory Allocation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Data center networks face packet drops and increased latency due to switch buffer overflow from bursty traffic and large in-casts, despite congestion control protocols, especially at Top-of-Rack switches, where packet retransmissions lead to added latency.
Innovation Solution
Implementing supplemental memory to store packets in overflow queues when target queues are full, with packet reordering at the receiver to ensure in-order delivery, and dynamically managing supplemental memory utilization to reduce packet drops and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If switch buffer size is increased to handle bursty traffic, then packet drop rate decreases, but device complexity and cost increase
Solution Approach 1:
The patent introduces a temporal dimension to buffering by implementing different buffer allocation strategies for different time periods. Off-peak buffers are allocated during low-traffic periods and released during high-traffic periods, effectively increasing buffer capacity without permanently dedicating resources. This resolves the contradiction by providing increased buffer capacity only when needed, rather than maintaining large buffers continuously.
Solution Approach 2:
The buffer allocation is made dynamic through time-based allocation and release mechanisms. The switch adapts buffer capacity to traffic conditions by allocating off-peak buffers when traffic is light and releasing them when traffic increases. This dynamic adjustment allows the system to maintain reliability during bursts while avoiding the complexity of permanently large buffers.
2Reliability
If supplemental memory is used to store overflow packets, then packet drop rate decreases, but packet delivery latency increases
Solution Approach 1:
The system performs preliminary actions by allocating off-peak buffers during low-traffic periods before bursts occur. These pre-allocated buffers are ready to absorb incoming burst traffic immediately, preventing packet drops without requiring packets to wait in supplemental memory. This resolves the latency issue by having buffer capacity ready in advance rather than allocating it after packets arrive.
Solution Approach 2:
The buffer memory is segmented into different types: primary buffers for normal traffic, off-peak buffers for burst absorption, and supplemental memory for overflow. This segmentation allows packets to be directed to the most appropriate buffer type, minimizing latency by using faster primary and off-peak buffers whenever possible, and only resorting to supplemental memory when absolutely necessary.
3Productivity
If off-peak buffers are allocated during low-traffic periods, then buffer utilization efficiency increases, but packet delivery latency increases for buffered packets
Solution Approach 1:
The system employs periodic allocation and release of off-peak buffers based on traffic patterns. Buffers are allocated during off-peak periods when traffic is low and released during peak periods when traffic is high. This periodic action maximizes buffer utilization efficiency during low-traffic times while minimizing latency during high-traffic times, as buffers are released and packets can be forwarded more quickly.
Data Source
AI summary
Examples described herein relate to a switch. In some examples, the switch includes circuitry that is configured to: based on receipt of a packet and a level of a first queue, select among a first memory and a second memory device among multiple second memory devices to store the packet, based on selection of the first memory, store the packet in the first memory, and based on selection of the second memory device among multiple second memory devices, store the packet into the selected second memory device. In some examples, the packet is associated with an ingress port and an egress port, and the selected second memory device is associated with a third port that is different than the ingress port or the egress port associated with the packet.